| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | soc/inte/*/gpio; Add GPE_EN and GPE_STS register definition | Maulik V Vaghela | 2022-05-16 | 1 | -0/+2 |
| * | soc/intel/tgl: correct wrong gpio GPI enable register base offset | Michael Niewöhner | 2021-09-23 | 1 | -1/+1 |
| * | soc/intel/{xeon-sp,icl,tgl,jsl,ehl}: add NMI_{EN,STS} registers | Michael Niewöhner | 2021-09-23 | 1 | -0/+2 |
| * | src/soc/intel: Drop unneeded empty lines | Elyes HAOUAS | 2020-09-21 | 1 | -5/+0 |
| * | treewide: Remove "this file is part of" lines | Patrick Georgi | 2020-05-11 | 1 | -1/+0 |
| * | soc/intel/tigerlake: Use SPDX for GPL-2.0-only files | Angel Pons | 2020-04-06 | 1 | -13/+2 |
| * | soc/intel/tigerlake: Remove Jasper Lake SoC references | Aamir Bohra | 2020-04-01 | 1 | -4/+295 |
| * | soc: Remove copyright notices | Patrick Georgi | 2020-03-18 | 1 | -1/+0 |
| * | soc/intel/tigerlake: Add Jasper lake GPIO support | Ronak Kanabar | 2020-03-03 | 1 | -299/+5 |
| * | soc/intel/tigerlake: Fix GPIO communities | Shaunak Saha | 2020-01-25 | 1 | -206/+248 |
| * | soc/intel/tigerlake: Do initial SoC commit till ramstage | Subrata Banik | 2019-11-09 | 1 | -0/+276 |
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index : coreboot.git | |
| Coreboot firmware sources | coreboot |
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