| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | soc/intel: Drop `romstage_pch_init()` function | Angel Pons | 2021-03-01 | 1 | -1/+0 |
| * | soc: move mainboard_get_dram_part_num prototype to memory_info.h | Nick Vaccaro | 2020-10-05 | 1 | -2/+0 |
| * | mb, soc: change mainboard_get_dram_part_num() prototype | Nick Vaccaro | 2020-10-05 | 1 | -1/+1 |
| * | soc/intel/tigerlake: Rename pch_init() code | Alexey Buyanov | 2020-08-26 | 1 | -1/+1 |
| * | treewide: Remove "this file is part of" lines | Patrick Georgi | 2020-05-11 | 1 | -1/+0 |
| * | soc/intel/tigerlake: Allow mainboard to override DRAM part number | Marco Chen | 2020-04-07 | 1 | -0/+2 |
| * | soc/intel/tigerlake: Use SPDX for GPL-2.0-only files | Angel Pons | 2020-04-06 | 1 | -13/+2 |
| * | soc: Remove copyright notices | Patrick Georgi | 2020-03-18 | 1 | -1/+0 |
| * | soc/intel/tigerlake: Update header files | Ravi Sarawadi | 2020-01-15 | 1 | -0/+8 |
| * | soc/intel/tigerlake/romstage: Do initial SoC commit till romstage | Subrata Banik | 2019-11-09 | 1 | -0/+25 |
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index : coreboot.git | |
| Coreboot firmware sources | coreboot |
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