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path: root/src/soc/intel/tigerlake
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* dptf: Move platform-specific information to `struct dptf_platform_info`Tim Wawrzynczak2021-04-132-0/+19
* intel/tigerlake: Add Acoustic featuresShaunak Saha2021-04-062-15/+10
* soc/intel/tigerlake: Fix REG_BASE_SIZETim Wawrzynczak2021-03-281-1/+1
* soc/intel/tigerlake: Move TCSS code to intel/common/blockTim Wawrzynczak2021-03-285-499/+4
* soc/intel: Rename and move MISCCFG_GPIO_PM_CONFIG_BITS definition to soc/gpio.hSubrata Banik2021-03-272-1/+7
* soc/intel/tigerlake: Add #include guards to soc/early_tcss.hTim Wawrzynczak2021-03-221-0/+5
* util: Add DDR4 generic SPD for H4AAG165WB-BCWENick Vaccaro2021-03-221-0/+1
* soc/intel/tgl: Add configurable value for PmcUsb2PhySusPgEnableDerek Huang2021-03-192-0/+5
* soc/intel/tigerlake: Remove obsolete CNVi Bluetooth PCI deviceCliff Huang2021-03-153-4/+0
* soc/intel/tigerlake: Add CNVi Bluetooth flag at devicetree entryCliff Huang2021-03-152-8/+9
* soc/intel/*: drop UART pad configuration from common codeMichael Niewöhner2021-03-121-34/+6
* soc/intel/tigerlake: Enable TCSS Muxes to disconnect mode during bootBrandon Breitenstein2021-03-055-53/+118
* soc/tigerlake: Fix TCSS code to calling back and forth to mainboard and socBrandon Breitenstein2021-03-053-14/+26
* soc/intel/tigerlake: Fix NULL being passed for response bufferFurquan Shaikh2021-03-051-18/+14
* soc/intel: Factor out common smmrelocate.cAngel Pons2021-03-033-251/+1
* soc/intel/tigerlake: Re-use existing define in CrashLog implementationFrancois Toguo2021-03-031-2/+2
* soc/intel: Retype `CnviBtAudioOffload` devicetree optionAngel Pons2021-03-031-4/+1
* soc/intel: Drop `bootblock_cpu_init()` functionAngel Pons2021-03-014-27/+2
* soc/intel: Drop `romstage_pch_init()` functionAngel Pons2021-03-014-14/+3
* soc/intel: Factor out common smbus.hAngel Pons2021-03-011-30/+3
* soc/intel: Factor out common gpe.hAngel Pons2021-03-011-114/+1
* soc/intel: Factor out identical acpigen GPIO helpersAngel Pons2021-03-012-37/+1
* soc/intel: Include gfx.asl from northbridgeAngel Pons2021-03-011-3/+0
* soc/intel/*/smmrelocate.c: Sync includesAngel Pons2021-02-241-9/+9
* soc/intel/*/smmrelocate.c: Uniformize cosmeticsAngel Pons2021-02-241-2/+1
* soc/intel/*/pmutil.c: Align cosmetics across platformsAngel Pons2021-02-241-8/+5
* soc/intel/{adl,jsl,ehl,tgl}: Remove ITSS polarity restoreAamir Bohra2021-02-241-7/+0
* soc/intel/tigerlake: Remove polling for Link Active Status at resumeJohn Zhao2021-02-231-12/+0
* soc/intel/tigerlake: Enable end of post support in FSPNick Vaccaro2021-02-221-0/+15
* soc/intel/tigerlake: Add CrashLog implementation for intel TGLFrancois Toguo2021-02-226-0/+365
* vc/google/chromeos: Always use CHROMEOS_RAMOOPS_DYNAMICKyösti Mälkki2021-02-161-3/+0
* ACPI: Add acpi_reset_gnvs_for_wake()Kyösti Mälkki2021-02-161-3/+0
* soc/intel: Drop aliases on MMCONF_BASE_ADDRESSKyösti Mälkki2021-02-161-3/+0
* soc/intel: Remove unused <console/console.h>Elyes HAOUAS2021-02-153-3/+0
* src: Remove unused <arch/cpu.h>Elyes HAOUAS2021-02-111-1/+0
* soc/intel/tgl: Update S0ix enable mask based on SoC and mainboard designShreesh Chhabbi2021-02-102-1/+77
* soc/amd,intel: Drop s3_resume parameter on FSP-S functionsKyösti Mälkki2021-02-092-4/+2
* soc/intel: Drop CID1 from GNVSKyösti Mälkki2021-02-081-4/+0
* drivers/intel/fsp2_0: Add support for MP services2 PPIAamir Bohra2021-02-061-1/+1
* intel: Rename config FSP_USES_MP_SERVICES_PPI to MP_SERVICES_PPIFurquan Shaikh2021-02-061-1/+1
* intel: Drop FSP_PEIM_TO_PEIM_INTERFACEFurquan Shaikh2021-02-061-1/+1
* soc/intel/tigerlake: Drops 100ms delay in TBT PCIe root ports _PS0John Zhao2021-02-041-2/+0
* soc/intel/tgl: Add configurable value for ConfigTdpLevelDerek Huang2021-02-031-0/+3
* src: Remove unused <cbmem.h>Elyes HAOUAS2021-02-031-1/+0
* soc/intel/*: drop incomplete and unneeded check for DMI SRLOCKMichael Niewöhner2021-01-311-16/+1
* soc/intel: Replace `SA_PCIEX_LENGTH` Kconfig optionsAngel Pons2021-01-301-1/+1
* device/Kconfig: Declare MMCONF symbols' type onceAngel Pons2021-01-291-1/+0
* arch/x86: Remove most C_ENV_BOOTBLOCK_SIZE limitsKyösti Mälkki2021-01-281-4/+0
* soc/intel: Move c-state resource defineMarc Jones2021-01-261-9/+0
* soc/intel/{skl,cnl,xsp,icl,tgl,ehl,adl,jsl}: use common LPC mirroringMichael Niewöhner2021-01-252-40/+2
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