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path: root/src/soc/intel/tigerlake
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* soc/intel/tigerlake: Update C-State infoWonkyu Kim2020-05-113-62/+20
* src/: Replace GPL boilerplate with SPDX headersPatrick Georgi2020-05-091-9/+1
* soc/intel: Replace GPLv2 long form headers with SPDX headerElyes HAOUAS2020-05-081-12/+1
* soc/intel/tigerlake: Add PMC to platform ACPI name entryJohn Zhao2020-05-071-0/+1
* treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi2020-05-067-84/+7
* treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi2020-05-068-16/+8
* soc/intel/tgl: Synchronize GPIO ASL table with Linux kernelShaunak Saha2020-05-063-89/+49
* soc/intel/tigerlake: Print HPR_CAUSE0 registerderek.huang2020-05-063-0/+8
* soc/intel/tigerlake: Add PMC mux controlJohn Zhao2020-05-051-1/+8
* soc/intel/tigerlake: Update interrupt settingWonkyu Kim2020-05-042-9/+10
* src/soc/tigerlake: Update SerialIoDebugMode UPD in FSP-MSrinidhi N Kaushik2020-05-041-0/+1
* acpi: Move ACPI table support out of arch/x86 (3/5)Furquan Shaikh2020-05-023-4/+4
* soc/intel/{jsl,tgl}: Rename PcdDebugInterfaceFlags macros for better understa...Subrata Banik2020-05-012-3/+3
* soc/intel/tigerlake: Fill PcieRpClkReqDetect from devicetreeMeera Ravindranath2020-05-012-0/+8
* src: Remove unused 'include <cpu/x86/cache.h>'Elyes HAOUAS2020-05-011-1/+0
* soc/intel/tigerlake: Check SPD is not NULL before printEric Lai2020-04-291-1/+6
* soc/intel/tigerlake: Add method to look up GPIO com ID for an indexVenkata Krishna Nimmagadda2020-04-291-0/+33
* soc/intel/tigerlake: fix call to print_spd_info()Nick Vaccaro2020-04-281-2/+2
* device: Constify struct device * parameter to write_acpi_tablesFurquan Shaikh2020-04-282-2/+2
* soc/intel/tigerlake: Fix FSP SPD index for DDR4Furquan Shaikh2020-04-251-1/+9
* soc/intel/tigerlake: Add ACPI GPIO opAlex Levin2020-04-241-0/+37
* soc/intel/tigerlake: Configure TCSS power managementJohn Zhao2020-04-224-0/+1464
* soc/intel/tigerlake: Update iDisp Link UPD settingsSrinidhi N Kaushik2020-04-202-6/+0
* soc/intel/tigerlake: Merge the recent change from other platformsWonkyu Kim2020-04-202-21/+35
* soc/intel/tigerlake: Remove eMMC/SD supportDuncan Laurie2020-04-174-42/+0
* soc/intel/tigerlake: Fix TCSS TBT PCIE root ports scope typeJohn Zhao2020-04-141-1/+1
* soc/intel/tigerlake: Implement CHIPSET_LOCKDOWNWonkyu Kim2020-04-141-0/+14
* soc/intel/tigerlake: Add function to dump ME firmware status informationKrishna Prasad Bhat2020-04-141-0/+161
* soc/intel/{icl,tgl}: Make use of print_me_fw_version() from CSE libKrishna Prasad Bhat2020-04-142-0/+20
* soc/intel/tigerlake: Configure RP settingWonkyu Kim2020-04-142-2/+11
* acpi: Bump FADT to revision 6Patrick Rudolph2020-04-131-1/+1
* soc/intel/tigerlake: Remove scs.aslAamir Bohra2020-04-131-122/+0
* soc/intel/tigerlake: Disable MrcSafeConfigSrinidhi N Kaushik2020-04-111-1/+0
* Replace DEVICE_NOOP with noop_(set|read)_resourcesNico Huber2020-04-101-2/+2
* Drop unnecessary DEVICE_NOOP entriesNico Huber2020-04-101-2/+0
* soc/intel/tigerlake: Add support to initialize DDR4 MemoryVarun Joshi2020-04-102-1/+172
* soc/intel/tigerlake/acpi: Fix typo in HDA in commentSubrata Banik2020-04-071-2/+2
* soc/intel/tigerlake: Allow mainboard to override DRAM part numberMarco Chen2020-04-072-2/+25
* soc/intel/tigerlake: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-0666-858/+132
* fsp2_0: Gather Kconfig declarationsNico Huber2020-04-051-3/+0
* soc/intel/tigerlake: Replace Reserved9 usage with DisableDimmCh# UPD.Srinidhi N Kaushik2020-04-051-1/+9
* Trim `.acpi_fill_ssdt_generator` and `.acpi_inject_dsdt_generator`Nico Huber2020-04-021-1/+1
* soc/intel/tigerlake: Add macros and SPD information for DDR4Furquan Shaikh2020-04-021-0/+16
* soc/intel/tigerlake: Reorganize memory initialization supportFurquan Shaikh2020-04-022-139/+282
* soc/intel/tigerlake: Remove Jasper Lake SoC referencesAamir Bohra2020-04-0137-2926/+977
* soc/intel/{tgl,jsl}: Use soc/intel/jasperlake for Jasper Lake SoCAamir Bohra2020-04-012-15/+3
* soc/intel/{icelake, tigerlake}: Remove DDI A lane programmingRonak Kanabar2020-03-301-19/+0
* soc/intel/tigerlake: Configure IOM_TYPEC_SW_CONFIGURATION_3Brandon Breitenstein2020-03-302-0/+10
* soc/intel/tigerlake: Configure HyperthreadingWonkyu Kim2020-03-252-2/+5
* soc/intel/tigerlake: Update DCACHE_BSP_STACK_SIZETim Wawrzynczak2020-03-231-2/+4
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