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path: root/src/soc/intel/xeon_sp/cpx/chip.c
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* include/device/device.h: Remove CHIP_NAME() macroNicholas Sudsgaard2024-01-311-1/+1
* soc/intel/xeon_sp: Redesign resource allocationArthur Heymans2024-01-151-3/+3
* soc/intel/xeon_sp: Skip empty socketsPatrick Rudolph2023-07-181-1/+3
* soc/intel/xeon_sp: Drop unused cpu.h headerArthur Heymans2023-02-261-1/+0
* soc/intel: Use common codeflow for MP initArthur Heymans2023-02-231-1/+1
* soc/intel/xeon_sp: Use common gpio.h includeDinesh Gehlot2023-01-181-1/+1
* soc/intel/xeon_sp: Move codes to support new PCHTim Chu2022-12-221-0/+1
* src: Make PCI ID define names shorterFelix Singer2022-03-071-2/+2
* cpu/x86/lapic: Move LAPIC configuration to MP initKyösti Mälkki2022-02-051-2/+0
* Spell Intel Cooper Lake-SP with a spacePaul Menzel2021-11-111-1/+1
* soc/intel/xeon_sp/cpx: Move MSR Locks to CPU init and fix themArthur Heymans2021-06-161-18/+0
* soc/intel/xeon_sp: Remove bogus SMRAM lockingArthur Heymans2021-05-051-8/+0
* soc/intel/xeon_sp/cpx: Add UPI locksMarc Jones2021-04-231-0/+8
* soc/intel/xeon_sp/cpx: Add IMC locksMarc Jones2021-04-231-0/+9
* soc/intel/xeon_sp: Set MSR locksMarc Jones2021-04-181-0/+19
* soc/intel/xeon_sp: More PCU locksMarc Jones2021-04-161-0/+4
* soc/intel/xeon_sp/cpx: Set PCU locksMarc Jones2021-03-201-0/+28
* soc/intel/xeon_sp: Add PCH lockdownMarc Jones2021-03-091-1/+2
* src/soc/intel/xeon_sp/cpx: Add enable IIO error masksRocky Phagura2021-02-241-1/+44
* soc/amd,intel: Drop s3_resume parameter on FSP-S functionsKyösti Mälkki2021-02-091-1/+1
* soc/intel: hook up new gpio device in the soc chipsMichael Niewöhner2020-12-301-0/+3
* soc/intel/xeon_sp: Lock PAM and SMRAM registersArthur Heymans2020-12-281-0/+12
* soc/intel/xeon_sp: Move DMICTL lockArthur Heymans2020-12-161-0/+1
* soc/intel/xeon_sp: Set coreboot defined IOAPIC and HPET BDFArthur Heymans2020-11-201-0/+2
* soc/intel/xeon_sp/cpx: Lock down P2SB SBIArthur Heymans2020-11-201-0/+4
* soc/intel/xeon_sp: Move set_bios_init_completion()Marc Jones2020-11-091-0/+1
* soc/intel/xeon_sp: Move common chip.c codeMarc Jones2020-10-301-519/+3
* soc/intel/xeon_sp: Move function debug macrosMarc Jones2020-10-291-0/+1
* soc/intel/xeon_sp/cpx: Implement platform_fsp_silicon_init_params_cbMarc Jones2020-10-191-1/+3
* soc/intel: Move pch_enable_ioapic() to common codeSubrata Banik2020-10-031-22/+2
* soc/intel/xeon_sp/cpx: add ACPI name for CSTACKJonathan Zhang2020-09-281-0/+12
* src/soc/intel: Drop unneeded empty linesElyes HAOUAS2020-09-211-1/+0
* soc/intel/xeon_sp/cpx: Finalize PCU configurationJonathan Zhang2020-06-221-0/+2
* soc/intel/xeon_sp/cpx: add cpu entries in ssdtJonathan Zhang2020-06-141-0/+1
* soc/intel/xeon_sp/cpx: add NUMA ACPI tablesJonathan Zhang2020-06-141-0/+2
* soc/intel/xeon_sp/cpx: add chip operation and PCIe enumerationJonathan Zhang2020-06-041-9/+523
* src: Remove unused '#include <cbfs.h>'Elyes HAOUAS2020-06-021-1/+0
* device/pci_device: Extract pci_domain_set_resources from SOCRaul E Rangel2020-05-121-5/+0
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* soc/intel/xeon_sp/cpx: Implement hide/unhide P2SB traditional danceAndrey Petrov2020-05-011-1/+3
* Replace DEVICE_NOOP with noop_(set|read)_resourcesNico Huber2020-04-101-2/+2
* Drop unnecessary DEVICE_NOOP entriesNico Huber2020-04-101-1/+0
* Drop explicit NULL initializations from `device_operations`Elyes HAOUAS2020-04-051-1/+0
* soc/intel/xeon_sp/cpx: Add multi-core initAndrey Petrov2020-04-041-6/+2
* soc/intel/xeon_sp: Add basic Cooperlake-SP supportAndrey Petrov2020-03-261-0/+98
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