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path: root/src/soc/intel/xeon_sp/cpx/romstage.c
Commit message (Expand)AuthorAgeFilesLines
* soc/intel/xeon_sp: Clean up device enablement configurationFelix Singer2024-05-021-3/+1
* soc/intel: Add max memory speed into dimm infoEric Lai2023-06-151-4/+2
* soc/intel/xeon_sp: move and rename set_cmos_mrc_cold_boot_flagJohnny Lin2023-05-231-45/+2
* soc/intel/xeon_sp/cpx: Allow creating meminfo for empty DIMM slotsAngel Pons2022-12-091-3/+15
* soc/intel: Add node_num to dimm_info struct + adjust dimm_info_fillDavid Milosevic2022-11-171-1/+2
* soc/intel/xeon_sp: accomodate xeon_sp FSPX_CONFIG definitionsJonathan Zhang2022-11-081-1/+1
* soc/intel/xeon_sp: Use "if (!ptr)" in preference to "if (ptr == NULL)"Elyes Haouas2022-09-151-4/+4
* soc/intel/xeon_sp/cpx: Set the MRC "cold boot required" status bitDeomid "rojer" Ryabkov2021-03-081-0/+31
* mb/ocp/deltalake: Fill ECC type in romstageAngel Pons2021-03-011-0/+20
* xeon_sp/cpx: Update meminfo max_capacity_mib and number_of_devicesJohnny Lin2021-01-281-0/+3
* soc/intel/xeon_sp/cpx: Disable isoch operation for performanceJohnny Lin2020-12-241-0/+3
* soc/intel/xeon_sp/cpx: Add save_dimm_info for SMBIOS type 17Johnny Lin2020-10-081-0/+90
* soc/intel/xeon_sp/cpx: add VT-d supportJonathan Zhang2020-08-141-0/+5
* xeon_sp/cpx: Enable PCH thermal device via FSPJohnny Lin2020-08-111-0/+7
* vendorcode/intel/fsp/fsp2_0/CPX-SP: update to ww32 release and adapt socJonathan Zhang2020-08-081-0/+4
* soc/intel/xeon_sp/cpx: enable PLATFORM_USES_FSP2_2Jonathan Zhang2020-08-031-10/+0
* vendocode/intel/fsp/fsp2_0/cpx_sp: Update to FSP ww28 release and adapt socJonathan Zhang2020-07-121-1/+1
* vendorcode/intel/fsp/fsp2_0/cpx_sp: Update to FSP ww24 release and adapt socJonathan Zhang2020-06-281-4/+0
* soc/intel/xeon_sp/cpx: configure FSP-M UPD parametersJonathan Zhang2020-06-141-5/+54
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* soc/intel/xeon_sp/cpx: Work around FSP-M issuesAndrey Petrov2020-04-241-0/+11
* soc/intel/xeon_sp/cpx: Allow motherboards to set FSP-M parametersAndrey Petrov2020-04-241-0/+3
* soc/intel/xeon_sp: Add basic Cooperlake-SP supportAndrey Petrov2020-03-261-0/+13
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