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path: root/src/soc/intel/xeon_sp
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* soc/intel: drop P_BLK supportMichael Niewöhner2021-10-133-20/+1
* src/soc to src/superio: Fix spelling errorsMartin Roth2021-10-051-1/+1
* soc/intel/xeon_sp/cpx: Use FSP repoArthur Heymans2021-09-232-3/+6
* soc/intel/xeon_sp/cpx: Rename FSP UPDs using CPPArthur Heymans2021-09-232-0/+13
* soc/intel/xeon_sp: correct wrong gpio register base offsetsMichael Niewöhner2021-09-231-4/+4
* soc/intel/{xeon-sp,icl,tgl,jsl,ehl}: add NMI_{EN,STS} registersMichael Niewöhner2021-09-232-0/+8
* drivers/intel/fsp2_0: Refactor MultiPhaseSiInit API calling methodSubrata Banik2021-09-161-6/+0
* mb/ocp: Remove superfluous FSP header CPP inclusionArthur Heymans2021-09-091-1/+0
* intel/xeon_sp/cpx: Hook up public microcode releaseArthur Heymans2021-09-092-1/+2
* cpu/x86/tsc: Deduplicate Makefile logicAngel Pons2021-09-082-2/+0
* src/*: Specify type of `DIMM_MAX` onceAngel Pons2021-09-031-1/+0
* src/*: Specify type of `DIMM_SPD_SIZE` onceAngel Pons2021-09-031-1/+0
* acpi: Fill fadt->century based on KconfigNico Huber2021-08-191-1/+0
* cpu/intel: Add dedicated file to grow Intel CPUIDsSubrata Banik2021-07-172-8/+2
* soc/intel/xeon_sp/cpx: Align Cooper Lake CPUID as per EDSSubrata Banik2021-07-171-2/+2
* src: Use initial_lapicid() instead of open coding itArthur Heymans2021-07-141-3/+2
* src: Introduce `ARCH_ALL_STAGES_X86`Angel Pons2021-07-021-1/+0
* src: Move `select ARCH_X86` to platformsAngel Pons2021-06-301-0/+1
* xeon_sp/{cpx,skx}: Add config IFD_CHIPSET 'lbg'Johnny Lin2021-06-282-0/+8
* security/intel/cbnt: Add loggingArthur Heymans2021-06-211-0/+5
* soc/intel/xeon_sp/cpx: Move MSR Locks to CPU init and fix themArthur Heymans2021-06-162-20/+10
* arch/x86/ioapic: Add get_ioapic_id() and get_ioapic_version()Kyösti Mälkki2021-06-121-4/+1
* cpu/x86: Default to PARALLEL_MP selectedKyösti Mälkki2021-06-071-1/+0
* src/intel/xeon_sp: add hardware error support (HEST)Rocky Phagura2021-06-047-0/+175
* qemu-q35,xeon_sp: Drop HAVE_SMI_HANDLER conditional with smm-classAngel Pons2021-05-261-1/+1
* soc/intel/xeon_sp: Skip locking down TXT related registersArthur Heymans2021-05-201-0/+6
* soc/intel/xeon_sp: Remove superfluous printkArthur Heymans2021-05-201-3/+0
* cpu/x86: Only include smm code if CONFIG_HAVE_SMI_HANDLER=yArthur Heymans2021-05-182-2/+0
* src: Match array format in function declarations and definitionsPatrick Georgi2021-05-131-1/+1
* src: Drop "This file is part of the coreboot project" linesAngel Pons2021-05-101-1/+0
* Revert "soc/intel/xeon_sp: Fix devices list in the DMAR DRHD structure"Arthur Heymans2021-05-061-13/+13
* soc/intel/xeon_sp: Remove bogus SMRAM lockingArthur Heymans2021-05-051-8/+0
* soc/intel/xeon_sp/cpx: Add UPI locksMarc Jones2021-04-232-0/+14
* soc/intel/xeon_sp/cpx: Add IMC locksMarc Jones2021-04-232-0/+15
* soc/intel/xeon_sp: Fix devices list in the DMAR DRHD structureAngel Pons2021-04-231-13/+13
* soc/intel/xeon_sp: Set PAM0123 lockMarc Jones2021-04-213-0/+20
* soc/intel/xeon_sp: Drop unused functions and prototypesAngel Pons2021-04-212-22/+0
* soc/intel/xeon_sp: Align pmc.c and pmutil.c with SkylakeAngel Pons2021-04-213-168/+180
* cpu/x86/smm: Drop the V1 smmloaderArthur Heymans2021-04-191-1/+0
* soc/intel/xeon_sp: Set SATA REGLOCKsMarc Jones2021-04-182-3/+24
* soc/intel/xeon_sp: Set MSR locksMarc Jones2021-04-183-0/+23
* soc/intel/xeon_sp: More PCU locksMarc Jones2021-04-164-3/+28
* soc/intel/xeon_sp: Call SMM finalizeMarc Jones2021-04-165-2/+68
* mb/ocp/deltalake: Override DDR frequency limit via VPD variableTim Chu2021-04-091-0/+15
* soc/intel/xeon_sp: Prepare for CBnT BPM generationArthur Heymans2021-03-302-2/+14
* soc/intel: Rename and move MISCCFG_GPIO_PM_CONFIG_BITS definition to soc/gpio.hSubrata Banik2021-03-271-0/+6
* soc/intel/xeon_sp: Move PCH PCI device definesMarc Jones2021-03-263-105/+58
* soc/intel/xeon_sp/cpx: Set PCU locksMarc Jones2021-03-202-1/+58
* soc/intel/xeon_sp/: Fix SMI_LOCK settingMarc Jones2021-03-204-16/+14
* soc/intel: Drop unused `GPIO_NUM_GROUPS` macroAngel Pons2021-03-201-1/+0
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