summaryrefslogtreecommitdiffstats
path: root/src/soc/intel
Commit message (Expand)AuthorAgeFilesLines
...
* soc/amd,intel: Drop leftover GNVS includesKyösti Mälkki2021-01-305-6/+0
* soc/intel/common/block: Create PCIE related macrosSubrata Banik2021-01-301-8/+48
* soc/intel/alderlake: Remove pch.h from SoC directorySubrata Banik2021-01-305-14/+4
* soc/intel: Remove duplicate call to acpi_wake_source()Kyösti Mälkki2021-01-298-82/+7
* device/Kconfig: Declare MMCONF symbols' type onceAngel Pons2021-01-2910-10/+0
* soc/intel: Drop CMEM from GNVSKyösti Mälkki2021-01-295-5/+5
* soc/intel/baytrail,broadwell: Use resume_from_stage_cache()Kyösti Mälkki2021-01-292-26/+9
* soc/intel: Remove selection of ME_REGION_ALLOW_CPU_READ_ACCESSSridhar Siricilla2021-01-281-1/+0
* xeon_sp/cpx: Update meminfo max_capacity_mib and number_of_devicesJohnny Lin2021-01-281-0/+3
* soc/intel/xeon_sp/skx: Add soc_acpi_nameMarc Jones2021-01-281-0/+13
* ACPI: Separate ChromeOS NVS in ASLKyösti Mälkki2021-01-286-24/+0
* ACPI: Declare GNVS variables globallyKyösti Mälkki2021-01-2810-70/+0
* arch/x86: Remove most C_ENV_BOOTBLOCK_SIZE limitsKyösti Mälkki2021-01-2813-52/+0
* soc/intel: Refactor acpi_wake_source()Kyösti Mälkki2021-01-283-30/+42
* soc/intel: Refactor fill_acpi_wake()Kyösti Mälkki2021-01-285-23/+19
* soc/intel/alderlake: Generate LP4x SPD files using gen_spd.goAmanda Huang2021-01-276-0/+179
* ACPI: Separate device_nvs_tKyösti Mälkki2021-01-2727-284/+245
* soc/intel/braswell/romstage/romstage.c: Use __func__Elyes HAOUAS2021-01-261-3/+2
* soc/intel/xeon_sp/acpi.c: Add ACPI C-State tableMarc Jones2021-01-265-2/+103
* soc/intel: Move c-state resource defineMarc Jones2021-01-268-63/+10
* sb,soc/intel: Refactor power_on_after_fail optionKyösti Mälkki2021-01-261-13/+15
* soc/intel/denverton_ns: Drop unused `pattrs.h`Angel Pons2021-01-251-40/+0
* soc/intel/adl and mb/intel/adlrvp: Use the newly added meminit block driverFurquan Shaikh2021-01-253-236/+301
* sb,soc/intel: Remove no-op APMC for C-state and P-stateKyösti Mälkki2021-01-255-58/+0
* cpu/x86/smm: Use common APMC loggingKyösti Mälkki2021-01-255-35/+5
* soc/intel/{skl,cnl,xsp,icl,tgl,ehl,adl,jsl}: use common LPC mirroringMichael Niewöhner2021-01-2519-265/+17
* soc/intel/lpc_lib: mirror LPC registers to DMI when requiredMichael Niewöhner2021-01-254-6/+31
* soc/intel/xeon_sp/cpx: Fix loading MCU on APsArthur Heymans2021-01-251-1/+6
* soc/intel/tgl and tgl mb/google,intel: Use the newly added meminit block driverFurquan Shaikh2021-01-253-540/+242
* soc/intel/common: Add support for populating meminit dataFurquan Shaikh2021-01-254-0/+362
* soc/intel/tigerlake: Disable Internal Gfx based on SOC_INTEL_DISABLE_IGDBora Guvendik2021-01-251-5/+6
* soc/intel/broadwell: Improve LPD0/LPD3 SerialIO ACPI methodsAngel Pons2021-01-241-30/+54
* soc/intel/broadwell: Drop enable check from LPD0/LPD3Angel Pons2021-01-241-26/+14
* soc/intel/quark/gpio_i2c.c: Use __func__Elyes HAOUAS2021-01-241-1/+1
* soc/intel/denverton_ns/pmc.c: Use __func__Elyes HAOUAS2021-01-241-1/+1
* soc/intel/denverton_ns/npk.c: Use __func__Elyes HAOUAS2021-01-241-1/+1
* soc/intel/denverton_ns/lpc.c: Use __func__Elyes HAOUAS2021-01-241-1/+1
* soc/intel/xeon_sp/cpx: Account for 'rc' heap managerArthur Heymans2021-01-241-3/+12
* soc/intel/lpc_lib: drop dead codeMichael Niewöhner2021-01-242-10/+0
* soc/intel/icl: drop wrong, unused codeMichael Niewöhner2021-01-243-33/+0
* soc/intel/cnl: use Kconfig to determine PCH typeMichael Niewöhner2021-01-244-48/+2
* soc/intel/broadwell: Align raminit with HaswellAngel Pons2021-01-243-19/+34
* soc/intel/broadwell: Drop `struct romstage_params`Angel Pons2021-01-242-17/+11
* broadwell: Flatten `mainboard_pre_raminit`Angel Pons2021-01-242-3/+8
* broadwell: Clean up `mainboard_post_raminit`Angel Pons2021-01-242-2/+6
* soc/intel/broadwell/chip.h: Drop unused fieldsAngel Pons2021-01-241-28/+0
* soc/intel/broadwell: Select CPU_INTEL_HASWELLAngel Pons2021-01-241-26/+2
* soc/intel/broadwell: Move romstage.c to HaswellAngel Pons2021-01-242-32/+0
* soc/intel/broadwell: Drop now-unused CPU codeAngel Pons2021-01-249-1545/+0
* soc/intel/broadwell: Use Haswell CPU headersAngel Pons2021-01-2410-24/+19