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path: root/src/soc/mediatek/mt8183/include/soc/dramc_register.h
Commit message (Expand)AuthorAgeFilesLines
* soc/mediatek/mt8183: Enable CA perbit mechanismHuayang Duan2020-09-251-1/+87
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* soc/mediatek: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-051-13/+2
* soc: Remove copyright noticesPatrick Georgi2020-03-181-1/+0
* soc/mediatek/mt8183: Do TX tracking for DRAM DVFS featureHuayang Duan2020-03-061-0/+152
* soc/mediatek/mt8183: Run calibration with multiple frequencies for DVFS switchHuayang Duan2019-10-181-1/+1
* soc/mediatek/mt8183: Refactor DRAM init by bit fields APIHung-Te Lin2019-10-171-518/+107
* mediatek/mt8183: Support more DRAM frequency bootupHuayang Duan2019-09-201-4/+3
* mediatek/mt8183: Implement the dramc init settingHuayang Duan2019-09-201-0/+2
* mediatek/mt8183: enable DDR low power featuremtk111952019-06-211-4/+1
* mediatek/mt8183: Add DDR driver of tx rx window perbit cal partHuayang Duan2018-12-111-1/+1
* mediatek/mt8183: Add DDR driver of pre-calibration partHuayang Duan2018-11-081-1/+1
* mediatek/mt8183: Correct MPU ctrl register addressHuayang Duan2018-10-261-17/+4
* mediatek/mt8183: Add register definitions of DRAM controllerTristan Shieh2018-10-181-0/+1228
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