| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | soc/mediatek: Unify PLL function names | Rex-BC Chen | 2022-10-21 | 1 | -2/+2 |
| * | soc/mediatek/mt8186: Add support for PMIC MT6315 | Sen Chu | 2022-10-21 | 1 | -0/+6 |
| * | soc/mediatek/mt8186: Enable ADSP clock | Mandy Liu | 2022-10-14 | 1 | -2/+5 |
| * | soc/mediatek/mt8186: Enable USB macro control | Allen-KH Cheng | 2022-08-12 | 1 | -0/+6 |
| * | soc/mediatek/mt8186/pll.c: Fix typo in log message | Elyes Haouas | 2022-06-01 | 1 | -1/+1 |
| * | soc/mediatek/mt8186: Lower SPI NOR speed to 52MHiz | Yu-Ping Wu | 2022-02-11 | 1 | -1/+1 |
| * | soc/mediatek/mt8186: Enable DCM | Edward-JW Yang | 2021-11-17 | 1 | -0/+31 |
| * | soc/mediatek/mt8186: Enable mmu operation for L2C SRAM and DMA | Rex-BC Chen | 2021-11-15 | 1 | -10/+10 |
| * | soc/mediatek/mt8186: Add PLL and clock init support | Chun-Jie Chen | 2021-11-05 | 1 | -0/+543 |
 |
index : coreboot.git | |
| Coreboot firmware sources | coreboot |
| summaryrefslogtreecommitdiffstats |