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path: root/src/soc/rockchip/rk3288/sdram.c
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* src: Make implicit fall throughs explicitJacob Garber2019-07-191-4/+2
* soc/rockchip/rk3288: Add fall through commentJacob Garber2019-07-171-0/+1
* src: Use 'include <string.h>' when appropriateElyes HAOUAS2019-03-201-1/+0
* device/mmio.h: Add include file for MMIO opsKyösti Mälkki2019-03-041-1/+1
* src: Don't use a #defines like Kconfig symbolsElyes HAOUAS2019-01-281-7/+7
* src: Remove duplicated round up functionElyes HAOUAS2018-11-291-6/+6
* tree: drop last paragraph of GPL copyright headerPatrick Georgi2015-10-311-4/+0
* Remove address from GPLv2 headersPatrick Georgi2015-05-211-1/+1
* rockchip/rk3288: Fix operator precedence error in LPDDR initJulius Werner2015-04-221-2/+2
* arm(64): Manually clean up the mess left by write32() transitionJulius Werner2015-04-211-11/+20
* arm(64): Globally replace writel(v, a) with write32(a, v)Julius Werner2015-04-211-108/+94
* rockchip: configure lpddr odt properlyDerek Basehore2015-04-211-4/+4
* rk3288: support single channel ddrjinkun.hong2015-04-211-1/+4
* rk3288: detect sdram size at runtimehuang lin2015-04-171-22/+73
* rk3288: Fix failing LPDDR3 reboot testjinkun.hong2015-04-151-3/+20
* rk3288: Fix failing DDR3 reboot testjinkun.hong2015-04-151-2/+2
* rk3288: Increase the delay after DDR reset de-assert to 10us.Dailunxue2015-04-131-1/+1
* rk3288: Change all SoC headers to <soc/headername.h> systemJulius Werner2015-04-081-8/+8
* veyron_pinky/rk3288: Use KHz, MHz and GHz constantsJulius Werner2015-04-041-16/+16
* coreboot: rk3288: add new ddr config and support ddr3 freq up to 800mhzjinkun.hong2015-04-021-11/+26
* rk3288: add cpu and chiphuang lin2015-03-241-1/+1
* rk3288: add ddr driverJinkun Hong2015-03-241-0/+1046
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