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* device/device.h: Rename pci_domain_scan_busArthur Heymans2023-10-2017-18/+18
* soc/intel/cannonlake: Support Comet Lake v1 and v2 in one buildJonathon Hall2023-10-203-2/+64
* soc/intel/meteorlake: Update TBT PCIe Reg Map offsets for QSRavi Sarawadi2023-10-191-4/+41
* soc/intel: Improve CONFIG_ACPI_SOC_INTEL_SLP_S0_FREQ_HZ useJeremy Compostella2023-10-193-3/+13
* soc/intel/alderlake: Fix incorrect microcode commentsMichał Żygowski2023-10-191-2/+2
* vc/intel/raptorlake: Use FSP v4301.01 headers for GoogleNick Vaccaro2023-10-191-1/+0
* soc/intel/mtl: Set slp-s0 counter frequencySukumar Ghorai2023-10-181-0/+6
* soc/intel/{adl, mtl}: Avoid redundant display init by joining to MBUSSubrata Banik2023-10-182-0/+2
* soc/intel/cmn/graphics: Implement API for IGD to join the MBUSSubrata Banik2023-10-182-1/+41
* soc/intel/alderlake: Add config for Client RPL FSP supportBora Guvendik2023-10-161-2/+4
* soc/intel/cmn/gfx: Detect dual display (eDP + HDMI)Subrata Banik2023-10-161-6/+25
* soc/amd/common/data_fabric_helper: add pre-processor guards for ACPIFelix Held2023-10-161-0/+4
* soc/amd/common/data_fabric/extended_mmio: fix compile errorsFelix Held2023-10-161-4/+5
* soc/intel/common/block/acpi/northbridge.asl: Reserve SBREG BARMichał Żygowski2023-10-161-0/+22
* soc/intel/xeon_sp/spr: Add SATA controllers 1 and 2 to devicetreeNaresh Solanki2023-10-131-1/+3
* soc/intel/cse: Remove unused header fileKrishna Prasad Bhat2023-10-131-1/+0
* soc/amd/genoa/include/data_fabric: add VGA decode enable registerFelix Held2023-10-121-0/+14
* soc/amd/genoa: add root complex support codeFelix Held2023-10-112-0/+63
* soc/amd/genoa/include: add data_fabric.hFelix Held2023-10-111-0/+124
* soc/amd/genoa: Enable uartVarshit Pandya2023-10-115-0/+59
* soc/amd/genoa: Add GPIO supportVarshit Pandya2023-10-113-0/+40
* soc/amd/genoa: Add SMI supportVarshit Pandya2023-10-112-0/+183
* soc/amd/genoa: Add GPIO definitionsVarshit Pandya2023-10-111-0/+270
* Kconfig: Bring HEAP_SIZE to a common, large valuePatrick Georgi2023-10-1116-65/+0
* memlayout.ld: Increase RAMSTAGE size to more than 1MB everywherePatrick Georgi2023-10-1116-20/+20
* soc/amd/genoa: Enable eSPI earlyArthur Heymans2023-10-105-0/+77
* soc/amd/genoa: Add aoac.c & enable AOAC devices earlyArthur Heymans2023-10-105-0/+57
* soc/amd/genoa: Enable cf9 IO earlyArthur Heymans2023-10-101-1/+1
* soc/mediatek: PCI: Fix translation windowJianjun Wang2023-10-091-18/+58
* soc/amd/common/vboot: Fix PSP verstage timestamps after TSC adoptionKarthikeyan Ramasubramanian2023-10-091-2/+2
* soc/intel/meteorlake: Reserve IOE P2SB MMIO correctlyKane Chen2023-10-091-2/+2
* mb/google/{rex,ovis}: Disable package C-state auto demotionSukumar Ghorai2023-10-072-0/+3
* soc/intel: separate slp-s0 residency counter frequency in LPIT tableSukumar Ghorai2023-10-051-2/+2
* soc/intel/cmn/gfx: Add API to report presence of external displaySubrata Banik2023-10-041-0/+50
* soc/intel: Select GMA v2 for ADL, MTL, TGL to reflect port/pipe defsSubrata Banik2023-10-043-0/+3
* soc/intel/jasperlake: Enable wake from USBReka Norman2023-10-042-0/+24
* soc/intel: Move USB wake methods to a common ASL fileReka Norman2023-10-0411-156/+65
* soc/amd: rework SPL file override and SPL fusing handlingFelix Held2023-10-0411-71/+86
* soc/intel/mtl: Select SOC_INTEL_CSE_LITE_PSR config for MeteorlakeKrishna Prasad Bhat2023-10-041-0/+1
* soc/intel/cse: Add entries to eventlog on PSR backup eventsKrishna Prasad Bhat2023-10-041-5/+19
* soc/intel/cse: Check PSR bit before issuing PSR backup commandAnil Kumar2023-10-042-1/+33
* soc/intel/cse: Back up PSR data during CSE FW downgradeAnil Kumar2023-10-042-0/+102
* soc/intel/cse: Implement APIs to access PSR backup status in CMOSKrishna Prasad Bhat2023-10-043-0/+91
* soc/intel/mtl: Override SOC_INTEL_CSE_FW_PARTITION_CMOS_OFFSETKrishna Prasad Bhat2023-10-041-0/+10
* soc/intel/mtl: Call cse_fill_bp_info early in romstageKrishna Prasad Bhat2023-10-041-2/+5
* soc/intel/cse: Add function to get cse_bp_info earlyKrishna Prasad Bhat2023-10-042-1/+84
* soc/intel/alderlake: Hook up FSP repo for RPL-P/SMatt DeVillier2023-10-031-0/+4
* soc/amd/common/noncar/cpu: simplify get_reserved_phys_addr_bitsFelix Held2023-10-021-5/+4
* soc/amd/common: use common physical address bit reservation codeFelix Held2023-10-026-10/+12
* soc/mediatek/mt8188: devapc: Add SCP domain settingJason Chen2023-10-023-0/+39
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