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Commit message (
Expand
)
Author
Age
Files
Lines
*
soc/amd/stoneyridge/acpi: Convert to ASL 2.0
Elyes HAOUAS
2021-02-09
2
-2
/
+2
*
soc/amd/common/memmap: add comment about types in memmap_early_dram
Felix Held
2021-02-08
1
-0
/
+1
*
soc/amd/picasso/iomap: change ACPI_CPU_CONTROL to match AGESA
Felix Held
2021-02-08
1
-1
/
+1
*
soc/intel/{baytrail,broadwell}: Add missing <cbmem.h>
Angel Pons
2021-02-08
2
-0
/
+2
*
soc/intel/braswell,skylake: Drop logo parameters from devicetree
Kyösti Mälkki
2021-02-08
4
-15
/
+0
*
soc/intel: Drop CID1 from GNVS
Kyösti Mälkki
2021-02-08
11
-32
/
+4
*
soc/intel/broadwell/include/soc/me.h: Clean includes
Elyes HAOUAS
2021-02-07
1
-1
/
+1
*
soc/intel/quark/storage_test.c: Remove redundant <commonlib/cbmem_id.h>
Elyes HAOUAS
2021-02-07
1
-1
/
+0
*
acpi: Fix BERT size_t printf format error
Benjamin Doron
2021-02-07
1
-1
/
+1
*
src: Remove redundant include <rules.h>
Elyes HAOUAS
2021-02-07
1
-1
/
+0
*
soc/intel/alderlake: Increase VBT size to 9 KiB
Maulik V Vaghela
2021-02-07
1
-0
/
+4
*
soc/amd/stoneyridge: remove STONEYRIDGE_ACPI_IO_BASE Kconfig option
Felix Held
2021-02-07
2
-8
/
+1
*
soc/amd/stoneyridge: remove STONEYRIDGE_ prefix of ACPI_IO_BASE define
Felix Held
2021-02-07
2
-11
/
+11
*
soc/intel/broadwell: Use common {DMI,EP,MCH}BAR accessors
Angel Pons
2021-02-07
6
-14
/
+17
*
soc/amd/cezanne/romstage: Store early dram region
Raul E Rangel
2021-02-07
1
-0
/
+3
*
soc/amd/picasso: Move memmap_early_dram to common blocks
Raul E Rangel
2021-02-07
6
-30
/
+36
*
soc/amd/cezanne/Makefile.inc: Fix indentation
Raul E Rangel
2021-02-07
1
-5
/
+5
*
soc/amd/cezanne/pcie_gpp: scan internal PCI buses
Felix Held
2021-02-07
2
-0
/
+25
*
soc/amd/cezanne/chip: add PCI bus scanning
Felix Held
2021-02-07
1
-0
/
+14
*
soc/intel/broadwell: Convert to ASL 2.0 syntax
Elyes HAOUAS
2021-02-07
1
-7
/
+8
*
drivers/intel/fsp2_0: Add support for MP services2 PPI
Aamir Bohra
2021-02-06
5
-5
/
+5
*
intel: Rename config FSP_USES_MP_SERVICES_PPI to MP_SERVICES_PPI
Furquan Shaikh
2021-02-06
6
-6
/
+6
*
intel: Drop FSP_PEIM_TO_PEIM_INTERFACE
Furquan Shaikh
2021-02-06
6
-7
/
+6
*
soc/intel/broadwell: Conditionally skip PRE_GRAPHICS_DELAY
Kyösti Mälkki
2021-02-06
2
-15
/
+0
*
soc/amd/stoneyridge: Create chipset_power_state in romstage
Kyösti Mälkki
2021-02-06
2
-10
/
+13
*
sb,soc/intel: Add wake source fields in GNVS
Kyösti Mälkki
2021-02-06
3
-1
/
+7
*
soc/amd/picasso: add UPD for RV2 USB3 phy setting adjust
Chris Wang
2021-02-05
2
-0
/
+49
*
soc/amd/cezanne/iomap: move MMIO range comment above MMIO ranges
Felix Held
2021-02-05
1
-1
/
+1
*
soc/amd/cezanne/fch: add ACPI I/O port setup
Felix Held
2021-02-05
3
-0
/
+69
*
soc/amd/picasso: remove PICASSO_ACPI_IO_BASE Kconfig option
Felix Held
2021-02-05
3
-13
/
+7
*
soc/intel/broadwell: Convert some CONFIG(CHROMEOS) preprocessor
Kyösti Mälkki
2021-02-05
1
-5
/
+1
*
soc/amd/cezanne: populate some FSP-M UPDs
Felix Held
2021-02-05
1
-0
/
+11
*
soc/amd/common: Refactor single GPIO programming
Kyösti Mälkki
2021-02-05
1
-20
/
+13
*
soc/amd/common: Separate single GPIO programming
Kyösti Mälkki
2021-02-05
1
-42
/
+52
*
soc/mediatek/mt8192: Use LZ4 compression for MCUs
Yu-Ping Wu
2021-02-05
1
-1
/
+1
*
soc/intel/xeon_sp/cpx: Override SMBIOS type 4 max speed
Tim Chu
2021-02-05
1
-0
/
+6
*
soc/intel/skylake/acpi/irqlinks.asl: Fix typo in comment
Elyes HAOUAS
2021-02-05
1
-1
/
+1
*
soc/intel/alderlake: Refactor PCIE port config
Eric Lai
2021-02-05
3
-59
/
+75
*
soc/intel/broadwell/pch/lpc.c: Program GEN_PMCON_3 in one write
Angel Pons
2021-02-05
1
-13
/
+9
*
soc/amd/common/block/acpi/pm_state: add missing include
Felix Held
2021-02-04
1
-0
/
+1
*
soc/amd/picasso/fch: add missing iomap.h include
Felix Held
2021-02-04
1
-0
/
+1
*
drivers/intel/fsp2_0: Fix running on x86_64
Patrick Rudolph
2021-02-04
2
-4
/
+4
*
acpi: Add support for reporting CrashLog in BERT table
Francois Toguo
2021-02-04
1
-0
/
+11
*
src: Remove useless comments in "includes" lines
Elyes HAOUAS
2021-02-04
1
-1
/
+1
*
soc/amd/picasso: Fix copy-paste error in macro definitions
Angel Pons
2021-02-04
1
-3
/
+3
*
soc/intel/tigerlake: Drops 100ms delay in TBT PCIe root ports _PS0
John Zhao
2021-02-04
1
-2
/
+0
*
src: Remove unused <bootstate.h>
Elyes HAOUAS
2021-02-04
2
-2
/
+1
*
src: Remove unused <cbfs.h>
Elyes HAOUAS
2021-02-04
1
-1
/
+0
*
soc/qualcomm/sc7180/aop_load_reset.c: Add missing <program_loading.h>
Elyes HAOUAS
2021-02-04
1
-1
/
+1
*
soc/mediatek/mt8192/spm.c: Add missing <string.h>
Elyes HAOUAS
2021-02-04
1
-1
/
+1
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