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* soc/intel/broadwell: Fix 'dead increment'Elyes HAOUAS2019-11-251-2/+1
* soc/amd: Move SCI enable outside table creationKyösti Mälkki2019-11-234-4/+18
* soc/intel/icelake: Make CpuMpPpi implementation default for ICLSubrata Banik2019-11-222-6/+5
* soc/intel/common/intelblocks: Define PAD_CFG0_MODE_NF7Nick Vaccaro2019-11-221-0/+1
* intel/smm: Provide common smm_relocation_paramsKyösti Mälkki2019-11-2223-283/+1
* soc/intel/skylake: Refactor pch_early_init() codeUsha P2019-11-227-16/+35
* Kconfig: Remove not found sourcesElyes HAOUAS2019-11-211-2/+0
* soc/intel/fsp_broadwell_de: Drop supportArthur Heymans2019-11-2151-6215/+0
* soc/intel/fsp_baytrail: Drop supportArthur Heymans2019-11-2168-11298/+0
* soc/intel/skylake: lockdown: lock global resetMichael Niewöhner2019-11-202-1/+5
* soc/intel/icelake: lockdown: lock global resetMichael Niewöhner2019-11-201-0/+3
* soc/intel/cannonlake: lockdown: lock global resetMichael Niewöhner2019-11-201-0/+3
* soc/intel/common: pmclib: make use of the new ETR address APIMichael Niewöhner2019-11-203-27/+17
* soc/intel/skylake: add soc implementation for ETR address APIMichael Niewöhner2019-11-201-0/+10
* cbfs: switch to region_device for location APIsAaron Durbin2019-11-201-11/+6
* Remove imgtec/pistachio SoCJulius Werner2019-11-2021-3241/+0
* lib/fmap: Disable pre-RAM cache for FSP 1.0Julius Werner2019-11-191-0/+1
* include: Make stdbool.h a separate fileJulius Werner2019-11-184-5/+5
* ipq40xx: Run python script without explicit 'python' callJulius Werner2019-11-181-1/+1
* */Makefile: Always build enable_usbdebug.cArthur Heymans2019-11-182-6/+6
* soc/amd/stoneyridge: Fix building with USBDEBUGArthur Heymans2019-11-181-0/+1
* soc/mediatek/mt8183: Get more space for PreRAM memconsoleHung-Te Lin2019-11-161-6/+6
* intel/skylake: Use new PCIe RP devicetree updateNico Huber2019-11-161-122/+17
* soc/intel: Implement PCIe RP devicetree update based on LCAPNico Huber2019-11-163-0/+228
* soc/intel/skylake/acpi/dptf: Disable DTRP when no DPTF_TSRX_SENSOR_ID is definedWim Vervoorn2019-11-151-0/+2
* soc/intel/{icl,tgl}: Rename pch_early_init() to pch_init()Subrata Banik2019-11-156-6/+6
* soc/intel/common: Make alignment proper for commentsSubrata Banik2019-11-153-12/+12
* soc/qualcomm: Link cbmem.c only in romstageArthur Heymans2019-11-144-5/+2
* rockchip/rk3288: Split free SRAM more evenly between stagesJulius Werner2019-11-141-4/+4
* soc/sifive/fu540: Support booting from SD cardXiang Wang2019-11-141-0/+2
* soc/intel/tigerlake: Include few more Tigerlake device IDsSubrata Banik2019-11-144-8/+100
* cbfs: Stop checking master headerJulius Werner2019-11-141-3/+3
* lib/fmap: Add optional pre-RAM cacheJulius Werner2019-11-1411-10/+21
* nvidia/tegra210: Enable RETURN_FROM_VERSTAGE to free up spaceJulius Werner2019-11-132-3/+3
* soc/intel/tigerlake: Remove FSP-T option in KconfigArthur Heymans2019-11-121-26/+2
* soc/intel/icelake: Remove FSP-T option in KconfigArthur Heymans2019-11-121-26/+2
* arch/x86/car.ld: Rename suffix _start/_endArthur Heymans2019-11-123-3/+3
* soc/intel/tigerlake: Remove deprecated CONFIG_SOC_INTEL_COMMON_BLOCK_SA_FSP_T...Subrata Banik2019-11-121-1/+0
* soc/{cannonlake,skylake}: Remove unused 'rdmsr(MSR_CONFIG_TDP_NOMINAL)'Elyes HAOUAS2019-11-112-2/+0
* soc/mediatek: Add missing '#include <console/console.h>'Elyes HAOUAS2019-11-112-0/+2
* drivers/intel/fsp2_0: move common cbmem_top_chipset to fsp driverMichael Niewöhner2019-11-119-37/+0
* soc/intel/denverton_ns: make use of common cbmem_top_chipsetMichael Niewöhner2019-11-114-27/+7
* soc/intel/tigerlake: Fix cbmem_topArthur Heymans2019-11-111-1/+1
* soc/intel/quark: make use of common cbmem_top_chipsetMichael Niewöhner2019-11-112-17/+2
* soc/intel/apollolake: make use of common cbmem_top_chipsetMichael Niewöhner2019-11-113-39/+1
* fsp{rangeley,baytrail,broadwell_de}: Fix dead assignmentElyes HAOUAS2019-11-112-8/+4
* rockchip/rk3288: Bump verstage size a little moreJulius Werner2019-11-111-2/+2
* soc/intel/icelake: add soc implementation for ETR address APIMichael Niewöhner2019-11-111-0/+5
* soc/intel/cannonlake: add soc implementation for ETR address APIMichael Niewöhner2019-11-111-0/+5
* soc/intel/apollolake: add soc implementation for ETR address APIMichael Niewöhner2019-11-111-0/+5
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