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* cbfs: Simplify load/map API names, remove type argumentsJulius Werner2020-12-0213-32/+20
* cbfs: Enable CBFS mcache on most chipsetsJulius Werner2020-12-0219-19/+39
* soc/intel/common/cse: Perform cse_fw_sync on BS_PRE_DEVICE entryFurquan Shaikh2020-12-021-8/+0
* soc/amd: factor out common SMI/SCI enums and function prototypesFelix Held2020-12-0214-86/+62
* soc/amd/common/smbus: remove misleading definitionFelix Held2020-12-022-2/+2
* soc/amd: factor out fch_smbus_initFelix Held2020-12-025-28/+23
* soc/amd: factor out SMBUS controller registers into common headerFelix Held2020-12-026-89/+53
* soc/amd: factor out common AOAC device enable and status query functionsFelix Held2020-12-0210-59/+53
* soc/amd: factor out common AOAC definitionsFelix Held2020-12-025-50/+39
* soc/intel/skylake: Fix compilation under x86_64Patrick Rudolph2020-12-022-3/+3
* soc/amd/picasso: add FSP binary locationFelix Held2020-12-021-0/+14
* soc/intel/elkhartlake: Update KconfigTan, Lean Sheng2020-12-021-13/+15
* soc/intel/skylake: Map VBIOS IDsPaul Menzel2020-12-021-0/+20
* soc/amd/stoneyridge: align AOAC code with PicassoFelix Held2020-12-012-48/+36
* soc/amd/picasso/aoac: make aoac_devs array unsignedFelix Held2020-12-011-1/+1
* soc/amd/picasso/aoac: fix typo in commentFelix Held2020-12-011-1/+1
* soc/intel/common/block/smm/smihandler: Fix compilation under x86_64Patrick Rudolph2020-12-011-2/+2
* soc/intel/common/block/cpu/car/exit_car: Fix compilation on x86_64Patrick Rudolph2020-12-011-0/+8
* soc/intel/common/block/cpu/car/cache_as_ram: Add x86_64 supportPatrick Rudolph2020-12-011-0/+11
* soc/intel/common/block/systemagent: Fix compilation on x86_64Patrick Rudolph2020-12-011-2/+2
* soc/intel/skylake: Fix commentFelix Singer2020-11-301-1/+1
* soc/amd/picasso: remove PICASSO_LPC_IOMUX Kconfig option from SoCFelix Held2020-11-301-6/+0
* soc/amd/picasso: remove unused AMDFW_OUTSIDE_CBFS Kconfig optionFelix Held2020-11-301-8/+0
* soc/amd: move bootblock inside main SoC directoriesFelix Held2020-11-304-2/+2
* soc/amd/common/vboot: use transfer_buffer_valid functionFelix Held2020-11-301-1/+1
* soc/amd: move vboot-on-PSP-related functions to common/vbootFelix Held2020-11-303-50/+52
* soc/amd: move vboot bootblock functions to common folderFelix Held2020-11-303-1/+2
* soc/amd: move assembly part of non-CAR bootblock to common directoryFelix Held2020-11-304-1/+2
* soc/amd/common: introduce SOC_AMD_COMMON_BLOCK_PCI_MMCONFFelix Held2020-11-302-1/+12
* soc/intel/alderlake: Add initial chipset.cbTim Wawrzynczak2020-11-302-0/+71
* soc/intel/tigerlake: Add some helper macros for accessing TCSS DMA devicesTim Wawrzynczak2020-11-301-2/+4
* lp4x: Add new memory parts and generate SPDsNick Vaccaro2020-11-301-0/+1
* soc/amd/common: add comments and FIXME to Makefile.inc filesFelix Held2020-11-304-4/+4
* soc/amd/common: simplify conditionals in MakefilesFelix Held2020-11-307-65/+96
* soc/amd/common/block/cpu: move CAR-specific Makefile to sub-directoryFelix Held2020-11-302-8/+9
* soc/intel: Configure P2SB before other PCH controllersFurquan Shaikh2020-11-297-13/+48
* soc/intel/alderlake: Add lp5_ccc_config to the board memory configurationSridhar Siricilla2020-11-292-0/+9
* soc/intel/skl: correct OC pin skip value for disabled usb portsMichael Niewöhner2020-11-281-5/+6
* soc/intel/jasperlake: Enable VT-d and generate DMAR TableMeera Ravindranath2020-11-271-0/+13
* soc/intel/{broadwell,quark}: Drop `PEI_DATA` typedefAngel Pons2020-11-252-4/+0
* soc/intel/xeon_sp: Enable SMI handlerRocky Phagura2020-11-2412-19/+205
* soc/intel/xeon_sp: Select INTEL_COMMON_BLOCK_TCOArthur Heymans2020-11-245-0/+50
* soc/intel/xeon_sp: Hook up the PMC driverArthur Heymans2020-11-241-0/+4
* soc/intel/skylake: Support NHLT 1ch DMICBenjamin Doron2020-11-243-0/+47
* soc/intel/skylake: Use correct NHLT_PDM_DEV definitionBenjamin Doron2020-11-241-2/+2
* mb/google/zork: correct USB2 phy TXVREFTUNE0 parameter nameKevin Chiu2020-11-231-1/+1
* soc/intel/cannonlake: Add ICC limits for CFL-S DT 4Angel Pons2020-11-231-0/+6
* soc/intel/denverton_ns: Hook up SMMSTOREAngel Pons2020-11-231-0/+25
* soc/intel/alderlake: Update UART0 GPIO as per latest schematicsSubrata Banik2020-11-231-2/+2
* soc/intel/alderlake: Update DCACHE_BSP_STACK_SIZE and DCACHE_RAM_SIZESubrata Banik2020-11-231-3/+3
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