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* soc/*: Report mp_init errorsPatrick Rudolph2019-08-062-7/+12
* soc/intel/{cnl,icl}: Add support to get LPSS controllers list from SOCAamir Bohra2019-08-052-0/+31
* soc/intel/common/lpss: Add function to check for a LPSS controllerAamir Bohra2019-08-052-0/+27
* soc/intel/cnl/graphics: Hook up libgfxinitNico Huber2019-08-051-14/+22
* soc/sifive/fu540: Add opensbi supportPatrick Rudolph2019-08-052-2/+11
* soc/intel/common/block/uart: Update the UART PCI device referenceAamir Bohra2019-08-046-31/+38
* intel/baytrail,broadwell: Move stage cache support functionKyösti Mälkki2019-08-036-68/+30
* soc/samsung/exynos5420: Refactor fimd vidtcon accessJacob Garber2019-08-023-12/+9
* mediatek: Refactor I2C code among similar SOCsQii Wang2019-08-025-335/+375
* soc/intel/cannonlake: Enable ACPI timer emulation if PM timer is disabledAamir Bohra2019-08-021-1/+7
* soc/intel/cannonlake: Disable ACPI PM timer to reduce S0ix power usageSubrata Banik2019-08-021-0/+3
* soc/intel/common/pch: Move thermal kconfig selection into common/pchSubrata Banik2019-08-024-3/+1
* soc/intel/icelake: Make use of common thermal code for ICLSubrata Banik2019-08-022-0/+11
* soc/intel/skylake: Make use of common thermal code for SKLSubrata Banik2019-08-026-135/+2
* soc/intel/cannonlake/bootblock: Clear the GPI IS & IE registersDavid Wu2019-08-011-0/+5
* soc/intel/skl: Add C232 chipset and reorder IDsFelix Singer2019-07-312-5/+7
* soc/intel/cannonlake: Enable FSP to use coreboot stack for cometlakeAamir Bohra2019-07-311-0/+2
* soc/amd/stoneyridge: Change code to accommodate Merlin Falcon SOCRichard Spiegel2019-07-315-21/+70
* soc/intel/common/block/lpss: Correct the PCI device referenceAamir Bohra2019-07-311-1/+3
* soc/intel/cannonlake: Enable PCH Thermal Sensor configuration for S0ixSumeet Pawnikar2019-07-312-0/+12
* soc/intel/common/block: Enable PCH Thermal Sensor for threshold configurationSumeet Pawnikar2019-07-315-0/+119
* soc/intel/cnl: Only print ME status one timeTim Wawrzynczak2019-07-301-1/+0
* soc/intel/cannonlake: Allow coreboot to handle required chipset lockdownSubrata Banik2019-07-301-0/+34
* soc/intel/cannonlake: Add new PCI IDsFelix Singer2019-07-306-2/+21
* soc/intel/{broad,cannon,sky}: Fix possible out-of-bounds readsJacob Garber2019-07-303-6/+6
* Revert "soc/intel/common: Set controller state to active in uart init"Christian Walter2019-07-291-6/+3
* soc/qualcomm/qcs405: Handle invalid QUP and BLSPJacob Garber2019-07-291-4/+8
* soc/intel/baytrail: Prevent unintended sign extensionsJacob Garber2019-07-292-12/+12
* soc/nvidia/tegra124: Assert divisor is non-zeroJacob Garber2019-07-291-0/+2
* soc/intel/cannonlake: Correct the data type of serial_io_devAamir Bohra2019-07-291-1/+1
* lib: Rewrite qemu-armv7 ramdetectPatrick Rudolph2019-07-281-9/+3
* soc/intel/baytrail/Makefile.inc: Sort entriesAngel Pons2019-07-261-31/+34
* soc/mediatek/mt8183: Init SSPMErin Lo2019-07-262-0/+7
* soc/nvidia/tegra124: Correct bitwise operatorsJacob Garber2019-07-261-2/+2
* soc/intel/fsp_broadwell_de: Fix use of config_of()Kyösti Mälkki2019-07-251-1/+3
* soc/intel: Guard remaining SA_DEV_ROOT definitionKyösti Mälkki2019-07-256-0/+12
* soc/intel/broadwell: Fix case of SA_DEV_ROOTKyösti Mälkki2019-07-251-0/+2
* soc/{qualcomm,rockchip}: Use 'include <stdlib.h>' when appropriateElyes HAOUAS2019-07-253-4/+3
* soc/mediatek: Use 'include <stdlib.h>' when appropriateElyes HAOUAS2019-07-252-2/+2
* soc/nvidia: Use 'include <stdlib.h>' when appropriateElyes HAOUAS2019-07-2511-17/+18
* soc/qualcomm/ipq806x: Remove unnecessary allocationJacob Garber2019-07-251-20/+12
* soc/intel/cannonlake: Split the "internal PME" wake-up into more detailPaul Fagerburg2019-07-251-1/+81
* soc/nvidia/tegra210: Prevent unintended sign extensionJacob Garber2019-07-251-2/+2
* soc/nvidia/tegra210: Add null pointer checkJacob Garber2019-07-251-1/+1
* soc/rockchip/rk3399: Use 64 bits in multiplicationJacob Garber2019-07-251-1/+1
* soc/intel/icelake: Add ENABLE_DISPLAY_OVER_EXT_PCIE_GFX kconfigSubrata Banik2019-07-251-0/+11
* soc/intel/common: Set controller state to active in GSPI initMeera Ravindranath2019-07-241-0/+15
* soc/intel/common: Set controller state to active in uart initUsha P2019-07-241-3/+6
* mediatek/mt8183: Add md power-off flowYanjie Jiang2019-07-234-1/+59
* soc/mediatek/mt8183: Support SSPMErin Lo2019-07-224-0/+72
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