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* drivers/intel/fsp2_0: move common cbmem_top_chipset to fsp driverMichael Niewöhner2019-11-119-37/+0
* soc/intel/denverton_ns: make use of common cbmem_top_chipsetMichael Niewöhner2019-11-114-27/+7
* soc/intel/tigerlake: Fix cbmem_topArthur Heymans2019-11-111-1/+1
* soc/intel/quark: make use of common cbmem_top_chipsetMichael Niewöhner2019-11-112-17/+2
* soc/intel/apollolake: make use of common cbmem_top_chipsetMichael Niewöhner2019-11-113-39/+1
* fsp{rangeley,baytrail,broadwell_de}: Fix dead assignmentElyes HAOUAS2019-11-112-8/+4
* rockchip/rk3288: Bump verstage size a little moreJulius Werner2019-11-111-2/+2
* soc/intel/icelake: add soc implementation for ETR address APIMichael Niewöhner2019-11-111-0/+5
* soc/intel/cannonlake: add soc implementation for ETR address APIMichael Niewöhner2019-11-111-0/+5
* soc/intel/apollolake: add soc implementation for ETR address APIMichael Niewöhner2019-11-111-0/+5
* soc/intel/common: pmclib: add API to get ETR register addressMichael Niewöhner2019-11-111-0/+3
* soc/intel/broadwell: Use common sb code for SPI lockdown configurationArthur Heymans2019-11-102-51/+3
* soc/intel/broadwell: Don't reinitialize SPI after lockdownArthur Heymans2019-11-102-25/+0
* soc/intel/broadwell: Use common INTEL_SB SPI codeArthur Heymans2019-11-104-699/+1
* soc/intel/broadwell: Use common SB RTC codeArthur Heymans2019-11-104-35/+3
* sb/intel/common: Remove the SOUTHBRIDGE_INTEL_COMMON Kconfig symbolArthur Heymans2019-11-101-1/+0
* sb/intel/common: Make linking rtc.c conditionalArthur Heymans2019-11-101-0/+1
* soc/intel/common/ebda: Drop codeArthur Heymans2019-11-107-161/+0
* soc/intel/common/sa: Remove EBDA dependencyArthur Heymans2019-11-107-30/+33
* arch/x86: Replace some __SMM__ guardsKyösti Mälkki2019-11-093-11/+10
* ELOG: Avoid some preprocessor useKyösti Mälkki2019-11-091-3/+1
* ELOG: Introduce elog_gsmi variantsKyösti Mälkki2019-11-097-52/+23
* soc/intel/tigerlake/acpi: Copy acpi directory from icelakeSubrata Banik2019-11-0911-0/+1486
* soc/intel/tigerlake: Do initial SoC commit till ramstageSubrata Banik2019-11-0939-0/+4761
* soc/intel/tigerlake/romstage: Do initial SoC commit till romstageSubrata Banik2019-11-098-0/+341
* soc/intel/tigerlake/bootblock: Do initial SoC commit till bootblockSubrata Banik2019-11-0913-0/+1131
* ELOG, soc/intel: Avoid some preprocessor useKyösti Mälkki2019-11-087-25/+6
* sb,soc/intel: Reduce preprocessor use with ME debuggingKyösti Mälkki2019-11-083-22/+14
* arch/x86: Drop some __SMM__ guardsKyösti Mälkki2019-11-088-16/+3
* intel/braswell: Remove duplicate set_max_freq() prototypesKyösti Mälkki2019-11-086-34/+2
* soc/intel/{apl,dnv,quark}: Use strip_quotes for FSP optionsMario Scheithauer2019-11-073-5/+5
* soc/intel/icelake: Refactor pch_early_init() codeSubrata Banik2019-11-075-12/+32
* soc/intel/common: Make native and FSP-T CAR init mutually exclusiveArthur Heymans2019-11-061-7/+7
* soc/intel/icelake: Set FSP_TEMP_RAM_STACK unconditionallySubrata Banik2019-11-061-1/+0
* soc/intel/common: Include Tigerlake device IDsRavi Sarawadi2019-11-0519-0/+57
* drivers/intel/fsp2_0: Use strip_quotes for cbfs filenamesWim Vervoorn2019-11-053-5/+5
* soc/intel/fsp_broadwell_de: Add CONFIG_IED_SIZE, drop CONFIG_SMM_TSEG_SIZEAndrey Petrov2019-11-051-2/+2
* soc/intel/common: Don't link CAR teardown in romstageArthur Heymans2019-11-051-1/+0
* soc/intel/sgx: convert SGX and PRMRR devicetree options to KconfigMichael Niewöhner2019-11-0419-64/+126
* soc/intel: skl,cnl,icl: consolidate ebda and memmapMichael Niewöhner2019-11-049-391/+80
* soc/intel: skl,cnl,icl: rely on TOLUM as cbmem_top returned by FSPMichael Niewöhner2019-11-048-541/+27
* sb/intel: Use defined CONFIG_HPET_ADDRESSElyes HAOUAS2019-11-045-8/+8
* soc/intel: Remove unused codePatrick Rudolph2019-11-049-128/+0
* soc/intel/broadwell: Use sb/intel/common/acpi/platform.aslArthur Heymans2019-11-041-38/+1
* soc/intel/{braswell,baytrail}: Use sb/common/intel/platform.aslArthur Heymans2019-11-043-112/+3
* arch/mips: Pass cbmem_top to ramstage via calling argumentArthur Heymans2019-11-041-1/+0
* soc/nvidia/tegra210: Populate _cbmem_top_ptrArthur Heymans2019-11-041-0/+6
* soc/intel/icelake: Make use of "all-y"Subrata Banik2019-11-041-26/+7
* soc/intel/icelake: Add alignment check for TSEG base and sizeSubrata Banik2019-11-041-0/+7
* soc/intel/icelake: Set DCACHE_BSP_STACK_SIZE default ~129KiB unconditionallySubrata Banik2019-11-041-2/+1
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