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* soc/intel/xeon_sp: Use a common function to get the IIO HOBArthur Heymans2020-11-124-32/+7
* soc/intel/alderlake: Add PCH ID 0x5181Subrata Banik2020-11-122-0/+2
* Delete soc/qualcomm/sdm845Julius Werner2020-11-1225-2631/+0
* mb/google/volteer: Configure IA32_L3_MASK_x MSRs for L3 CQOSShreesh Chhabbi2020-11-111-1/+2
* soc/intel/tigerlake: Update Kconfig for NEM Enhanced ModeShreesh Chhabbi2020-11-111-1/+1
* soc/intel/tigerlake: Log PM event from an internal deviceKarthikeyan Ramasubramanian2020-11-104-6/+84
* soc/intel/jasperlake: Log PM event from an internal deviceKarthikeyan Ramasubramanian2020-11-104-6/+84
* soc/intel/skylake: Enable PCH thermal depending on devicetreeBenjamin Doron2020-11-091-0/+2
* soc/nvidia/tegra124/include/soc/clk_rst.h: Remove extra tabElyes HAOUAS2020-11-091-1/+1
* soc/intel/jasperlake: Enable Intel FIVR RFI settingsMaulik V Vaghela2020-11-092-0/+22
* soc/amd/*/smi.h: Move the pm_acpi_smi_cmd_port function declarationArthur Heymans2020-11-094-2/+2
* soc/intel/xeon_sp: Don't add memory resource twiceMarc Jones2020-11-091-0/+4
* soc/intel/xeon_sp: Move set_bios_init_completion()Marc Jones2020-11-097-253/+137
* soc/intel/xeon_sp: Look up the IIO_HOB only onceArthur Heymans2020-11-091-1/+4
* soc/amd/common: add Kconfig help text to pre-family-17h-only blocksFelix Held2020-11-092-1/+5
* soc/intel/jasperlake: Correct GPIO pad sequence for community pad groupMaulik V Vaghela2020-11-091-14/+11
* soc/intel/jasperlake: Update reserved GPIO names in gpio_soc_defs.hMaulik V Vaghela2020-11-092-146/+132
* soc/intel/jasperlake: Add PCH PCIe RPs wake up events to event logTim Wawrzynczak2020-11-091-3/+38
* soc/intel/tigerlake: Add PCH PCIe RPs wake up events to event logTim Wawrzynczak2020-11-091-2/+37
* soc/intel/common/acpi: create pep.asl from lpit.aslMichael Niewöhner2020-11-091-0/+103
* intel/common/pmc: Add functions for IPC mailbox in ACPIDuncan Laurie2020-11-094-3/+195
* soc/intel/tigerlake: Utilize vbt data size Kconfig optionSrinidhi N Kaushik2020-11-091-0/+4
* soc/intel/*/chip: Remove unused devicetree entryPatrick Rudolph2020-11-095-5/+0
* acpi: Call acpi_fill_ssdt() only for enabled devicesKarthikeyan Ramasubramanian2020-11-093-7/+1
* soc/intel/xeon_sp/skx: Reorder soc_util.cMarc Jones2020-11-091-97/+95
* soc/amd/common: Don't program GPIOs if the table isn't setMartin Roth2020-11-071-0/+2
* soc/amd/common/psp: expand CPU family names in Kconfig help textFelix Held2020-11-071-2/+2
* mb/intel: Enable ALC711 Audio codec over SNDW0 linkSridhar Siricilla2020-11-071-2/+1
* sc7180: Correct mmu configuration for AOP SRAM regionsT Michael Turney2020-11-063-3/+6
* soc/amd/picasso: add Raven1 GPU PCI IDFelix Held2020-11-061-0/+2
* soc/amd/picasso/cpu: add Raven1 CPUID to CPU tableFelix Held2020-11-061-0/+1
* soc/amd/picasso: Set vboot hashing block size to 36kMartin Roth2020-11-061-0/+16
* soc/amd/picasso: Up stack size to 40k for vboot hash bufferMartin Roth2020-11-062-3/+6
* soc/intel/xeon_sp/skx: Fix MADT CPU indexesMarc Jones2020-11-061-1/+2
* soc/intel/xeon_sp: Move CPU helper functionsMarc Jones2020-11-069-278/+147
* soc/intel/xeon_sp/cpx: Reorder cpu.c .h includesMarc Jones2020-11-061-1/+2
* amdfwtool: Use shell command to get depend file listZheng Bao2020-11-062-2/+4
* soc/amd/picasso: Update coreboot UPD variable names to include unitsZheng Bao2020-11-063-50/+50
* soc/intel/tigerlake: Disable C1 C-state DemotionRavi Sarawadi2020-11-051-0/+4
* soc/amd/picasso: move MAX_CPUS setting from mainboard to SoC KconfigFelix Held2020-11-051-0/+4
* soc/intel/xeon_sp: Use common cpu/intel romstage entryArthur Heymans2020-11-054-24/+24
* soc/intel/broadwell: Merge `device_nvs.asl` into `globalnvs.asl`Angel Pons2020-11-042-39/+32
* soc/intel/broadwell: Include EC and IRQ links ACPI earlyAngel Pons2020-11-041-2/+4
* soc/intel/broadwell/pch: Use common PCIe ACPI codeAngel Pons2020-11-043-214/+1
* soc/intel/broadwell/pch/acpi: Add PCIe register offsetsAngel Pons2020-11-041-0/+6
* soc/intel/broadwell/gma.c: Align struct with HaswellAngel Pons2020-11-041-5/+5
* soc/intel/broadwell: Use common irqlinks.aslAngel Pons2020-11-042-474/+1
* soc/intel/broadwell/pch/acpi/irqlinks.asl: Add missing IRQsAngel Pons2020-11-041-8/+8
* soc/intel/broadwell: Align ACPI with Haswell/LynxpointAngel Pons2020-11-045-56/+46
* soc/amd/common/psp: move v1-only mailbox commands to separate sectionFelix Held2020-11-041-1/+2
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