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* mainboards: Drop PWRS from GNVSKyösti Mälkki2021-02-1119-19/+19
* soc/amd/cezanne/smihandler: add basic SMI APMC and sleep handlerFelix Held2021-02-111-0/+76
* soc/amd/cezanne: select soc-specific ACPI functionalityFelix Held2021-02-113-0/+33
* soc/amd/*/smihandler: use size_t and unsigned intFelix Held2021-02-112-4/+6
* soc/amd/*/smihandler: remove replace southbridge references with fchFelix Held2021-02-112-8/+8
* soc/amd/cezanne/chip: set device operations for UART MMIO devicesFelix Held2021-02-111-0/+9
* soc/amd/cezanne: add empty mp_init_cpusFelix Held2021-02-112-2/+7
* soc/amd/cezanne/cpu: add basic zen_2_3_init functionalityFelix Held2021-02-111-0/+4
* src: Remove unused <arch/cpu.h>Elyes HAOUAS2021-02-118-8/+0
* soc/intel/broadwell: Remove _ADR from SerialIO ACPI devicesAngel Pons2021-02-111-8/+0
* soc/intel/xeon_sp; Remove unneeded whitespace before tabElyes HAOUAS2021-02-111-1/+1
* soc/amd: fully commonize clear_tvalidFelix Held2021-02-115-44/+34
* soc/amd/cezanne/smihandler: add missing southbridge_io_trap_handlerFelix Held2021-02-111-0/+6
* soc/amd: include cpu/x86/smm directory in common SMM MakefileFelix Held2021-02-114-3/+2
* soc/amd: move southbridge_smi_handler to common codeFelix Held2021-02-116-90/+59
* soc/amd: factor out common SMM relocation codeFelix Held2021-02-119-96/+79
* soc/amd*/smihandler: factor out and rename clear_smi_sci_statusFelix Held2021-02-114-18/+10
* soc/amd*/smihandler: factor out and rename clear_all_smi_statusFelix Held2021-02-114-24/+14
* soc/amd/cezanne: add empty SMM-handlerFelix Held2021-02-113-0/+24
* soc/amd/stoneyridge: drop empty sb_enableFelix Held2021-02-113-9/+0
* soc/amd/cezanne/fch: add HAVE_SMI_HANDLER case to fch_init_acpi_portsFelix Held2021-02-102-2/+25
* soc/amd/stoneyridge/chip: rewrite enable_dev as switch case statementFelix Held2021-02-101-4/+12
* soc/amd/cezanne: Add verstage supportRaul E Rangel2021-02-101-0/+21
* soc/amd/common/psp_gen2: print error for uninitialized MSR_PSP_ADDRFelix Held2021-02-101-1/+1
* soc/amd/common/block/psp: factor out soc_get_psp_base_addressFelix Held2021-02-101-7/+10
* soc/amd/cezanne: Enable SOC_AMD_COMMON_BLOCK_SPIRaul E Rangel2021-02-101-0/+2
* soc/amd/common/blocks/lpc: Remove common SPI registersRaul E Rangel2021-02-105-10/+5
* soc/amd/cezanne: Add SPI registersRaul E Rangel2021-02-101-0/+16
* soc/amd/picasso: Add SPI registersRaul E Rangel2021-02-101-0/+16
* soc/amd/stoneyridge: Add SPI registersRaul E Rangel2021-02-101-0/+15
* soc/intel/xeon_sp/include/soc/acpi_asl.h: Convert to ASL 2.0Elyes HAOUAS2021-02-101-6/+6
* soc/intel/skylake: Convert to ASL 2.0 syntaxElyes HAOUAS2021-02-1012-139/+135
* soc/intel/skylake/acpi: Add PEP tableBenjamin Doron2021-02-101-0/+3
* soc/amd/common/block: Fix guards for PSP transfer bufferRaul E Rangel2021-02-102-4/+6
* soc/amd/common/block/cpu/noncar: Remove unneeded whitespace before tabElyes HAOUAS2021-02-101-1/+1
* soc/amd/picasso/smihandler: replace southbridge.c in comment with fch.cFelix Held2021-02-101-1/+1
* soc/amd/cezanne/chip: add empty set_mmio_dev_opsFelix Held2021-02-101-0/+7
* soc/amd/cezanne/chip: add empty cpu_bus_opsFelix Held2021-02-101-0/+8
* soc/amd/block/psp/psp: raise log level of PSP failure messagesFelix Held2021-02-101-1/+1
* soc/intel/broadwell/pch: Simplify PCI RMW operationsAngel Pons2021-02-103-40/+33
* soc/intel/broadwell: Use common MADT codeAngel Pons2021-02-103-49/+1
* soc/intel/broadwell/pch: Drop `acpi_sci_irq` functionAngel Pons2021-02-104-33/+2
* soc/intel/{cnl,skl}: Add alignment check for TSEG base and sizeBenjamin Doron2021-02-102-0/+12
* soc/intel/tgl: Update S0ix enable mask based on SoC and mainboard designShreesh Chhabbi2021-02-102-1/+77
* src: Remove unused <boot_device.h>Elyes HAOUAS2021-02-102-2/+1
* soc/amd: Move southbridge_smi_set_eos to common/blocks/smi/smi_utilFelix Held2021-02-103-14/+7
* soc/amd: Move global_smi_enable to common/blocks/smi/smi_utilFelix Held2021-02-105-42/+9
* soc/amd: Move soc_route_sci to common/blocks/smi/smi_utilFelix Held2021-02-104-15/+5
* soc/amd/picasso: Move APM_CNT_SMMINFO callsiteKyösti Mälkki2021-02-102-6/+7
* Revert "soc/amd/picasso: Change GPIO _HID to AMDI0030"Martin Roth2021-02-091-1/+1
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