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* soc/intel/skylake: Update GFX devtree optionsMaxim Polyakov2019-04-062-1/+32
* soc/intel/braswell: Correct serial IRQ supportFrans Hendriks2019-04-043-10/+38
* soc/nvidia/tegra210: Increase bootblock sizeMartin Roth2019-04-041-3/+3
* mediatek/mt8183: Fix RTC initialization flowRan Bi2019-04-026-160/+294
* vboot: Select CONFIG_VBOOT_OPROM_MATTERS in more casesJulius Werner2019-04-013-0/+3
* soc/intel/cannonlake: Add FSP UPD to unlock GPIO pads in devicetreeKrishna Prasad Bhat2019-04-012-0/+6
* src: Use include <reset.h> when appropriateElyes HAOUAS2019-03-295-5/+0
* soc/intel/cannonlake: Ignore GBE LTRLijian Zhao2019-03-292-0/+15
* soc/intel/icelake: Fix chipset_power_state structureSubrata Banik2019-03-291-3/+1
* qcs405: Add support for USB host modeVijayavardhan Vennapusa2019-03-284-2/+351
* soc/intel/apollolake: Add support to log XHCI wake eventsKarthikeyan Ramasubramanian2019-03-282-0/+23
* soc/intel/common: Move support to log XHCI wake eventsKarthikeyan Ramasubramanian2019-03-286-137/+205
* soc/intel/cannonlake: Update CPU Ratio base on MSRLijian Zhao2019-03-281-13/+6
* soc/intel/cannonlake: Configure voltage margining policiesKrzysztof Sywula2019-03-272-1/+17
* Move calls to quick_ram_check() before CBMEM initKyösti Mälkki2019-03-273-15/+0
* device/pciexp_device: Convert LTR non-snoop/snoop value into common macroSubrata Banik2019-03-272-7/+5
* qcs405: clock: Adding the clock support for qcs405Pranav Agrawal2019-03-265-0/+449
* qcs405: Add GPIO APINitheesh Sekar2019-03-264-2/+400
* vboot: remove VBOOT_EC_SLOW_UPDATE Kconfig optionJoel Kitching2019-03-251-1/+0
* soc/apollolake: Add UART0Felix Singer2019-03-251-0/+7
* Fix up remaining boolean uses of CONFIG_XXX to CONFIG(XXX)Julius Werner2019-03-253-3/+3
* soc/intel/cannonlake: Clear PMCON status bitsKrishna Prasad Bhat2019-03-253-0/+19
* intel/apollolake: Add HDA to disable_dev functionNico Huber2019-03-241-0/+3
* soc/intel/common: Remove common chip config use_fsp_mp_initSubrata Banik2019-03-247-36/+8
* soc/intel/common: Add Kconfig option to choose desired MP Init for platformSubrata Banik2019-03-241-0/+27
* soc/intel/broadwell: Fix use of CONFIG_USBDEBUGKyösti Mälkki2019-03-222-2/+2
* soc/intel/cannonlake: Enable power button smi in pre-OSKrzysztof Sywula2019-03-222-1/+16
* soc/intel/{baytrail,braswell}: Make use of generic set_subsystem()Kyösti Mälkki2019-03-222-24/+2
* arch/mips: Fix <arch/mmio.h> prototypesKyösti Mälkki2019-03-229-227/+227
* vboot: standardize on working data sizeJoel Kitching2019-03-216-6/+6
* soc/intel/cannonlake: Assign FSP UPDs for HPD and Data/CLK of DDI portsKrishna Prasad Bhat2019-03-212-0/+30
* {northbridge, soc, southbridge}/intel: Make use of generic set_subsystem()Subrata Banik2019-03-212-21/+2
* {northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem()Subrata Banik2019-03-217-86/+7
* nvidia/tegra{124,210}/lp0: Directly include `stdint.h`Nico Huber2019-03-214-6/+2
* soc/nvidia/tegra{124,210}: Remove unneeded 'include <halt.h>'Elyes HAOUAS2019-03-202-2/+0
* src: Use 'include <string.h>' when appropriateElyes HAOUAS2019-03-2065-61/+12
* soc/intel/cannonlake: Fix return values for get_param_valueFurquan Shaikh2019-03-201-3/+9
* soc/intel/icelake: Enable support for FSP 2.1 specificationSubrata Banik2019-03-191-2/+1
* rockchip/rk3399: Remove obsolete BL31 resource reservationJulius Werner2019-03-191-7/+0
* soc/intel/braswell: Use IRQ 9 for SCIFrans Hendriks2019-03-191-1/+10
* soc/intel/braswell/romstage: Drop unused 'include <rtc.h>'Elyes HAOUAS2019-03-191-1/+0
* src: Drop unused 'include <cbfs.h>'Elyes HAOUAS2019-03-192-4/+0
* Fix 'unsigned int' to bare use of 'unsigned'Subrata Banik2019-03-191-1/+1
* qcs405: Add DRAM resourcesNitheesh Sekar2019-03-183-4/+12
* qcs405: Add Timer supportNitheesh Sekar2019-03-182-7/+4
* soc/qualcomm/qcs405: Add MMU supportNitheesh Sekar2019-03-185-1/+81
* soc/qualcomm/qcs405: Support for new SoCNitheesh Sekar2019-03-189-0/+284
* soc/intel/braswell: Reserve IOAPIC and ROM resourcesFrans Hendriks2019-03-181-0/+5
* src: Drop unused 'include <romstage_handoff.h>'Elyes HAOUAS2019-03-187-7/+0
* soc/intel/cannonlake: Pass coreboot debug interface info to FSPMaulik V Vaghela2019-03-181-0/+11
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