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* amd/stoneyridge: Create new wide IO functionsRichard Spiegel2017-12-072-0/+150
* soc/intel/apollolake: add ability to enable eSPIBora Guvendik2017-12-073-0/+9
* soc/intel/apollolake: Clean up UART codeAamir Bohra2017-12-073-83/+61
* soc/intel/skylake: Clean up UART codeAamir Bohra2017-12-074-94/+54
* soc/intel/cannonlake: Make use of Intel common Graphics blockSubrata Banik2017-12-072-39/+5
* soc/intel/apollolake: Make use of Intel common Graphics blockSubrata Banik2017-12-072-44/+9
* soc/intel/skylake: Make use of Intel common Graphics blockSubrata Banik2017-12-073-93/+21
* soc/intel/common/block: Add Intel common Graphics controller supportSubrata Banik2017-12-074-0/+195
* Revert "soc/intel/skylake: Clean up SoC ASL code."Matt DeVillier2017-12-071-0/+18
* amd/stoneyridge: Create new name/IRQ associationRichard Spiegel2017-12-074-51/+119
* rockchip/rk3399: Select GENERIC_GPIO_LIB KconfigJulius Werner2017-12-071-0/+1
* soc/amd/stoneyridge: Add USB OC supportMarc Jones2017-12-062-1/+64
* soc/amd/stoneyridge: Add XHCI PM register access functionsMarc Jones2017-12-063-0/+37
* soc/intel/cannonlake: Fix DSX_CFG macro name for AC_PRESENTFurquan Shaikh2017-12-052-2/+2
* soc/intel/skylake: Fix DSX_CFG macro name for AC_PRESENTFurquan Shaikh2017-12-052-2/+2
* amd/stoneyridge: Transfer functions from early_setup.c to southbridge.cRichard Spiegel2017-12-043-258/+249
* soc/intel/apollolake: Add PNP configDivya Chellap2017-12-025-0/+860
* riscv: Remove config string supportJonathan Neuschäfer2017-12-021-1/+0
* soc/intel/cannonlake: Initialize PMC controllerSubrata Banik2017-12-023-89/+32
* soc/intel/common/block: Add Intel common PMC controller support for KBL, APLSubrata Banik2017-12-028-219/+248
* soc/amd/stoneyridge: Add GPIO40 to GPIO listMartin Roth2017-12-021-0/+1
* soc/amd/stoneyridge: Add RunOnAP supportMarc Jones2017-12-022-19/+78
* amd/stoneyridge: Update def_callouts.c to reset using reset.cMartin Roth2017-12-011-4/+6
* soc/amd/stoney: clean up and update reset.cMartin Roth2017-12-014-20/+37
* acpi/tpm: remove non-existent IRQ for Infineon TPM chipMatt DeVillier2017-11-303-3/+0
* amd/{hudson,stoneyridge}: fix out of bounds readRichard Spiegel2017-11-301-3/+3
* acpi/tpm: update TPM preprocessor guardsMatt DeVillier2017-11-303-3/+3
* soc/intel/skylake: Set low maximum temperature threshold for Thermal DeviceSubrata Banik2017-11-306-0/+140
* soc/intel/{APL,GLK}: Use Intel SRAM common codeV Sowmya2017-11-303-74/+1
* soc/intel/common: Add Intel SRAM common code supportV Sowmya2017-11-304-0/+87
* soc/amd/stoneyridge: Add mainboard call for SPD valuesMarc Jones2017-11-294-71/+57
* soc/intel/skylake: Make use of Intel common DSP blockSubrata Banik2017-11-285-38/+2
* google/scarlet: support kd097d04 panelLin Huang2017-11-282-2/+3
* rockchip/rk3399: support dual mipi dsiLin Huang2017-11-288-131/+217
* rockchip/rk3399: mipi: properly configure PHY timingLin Huang2017-11-282-12/+88
* rockchip/rk3399: improve mipi transfer flowLin Huang2017-11-282-12/+64
* rockchip/rk3399: mipi: correct Feedback divider settingLin Huang2017-11-281-22/+67
* rockchip/rk3399: mipi: correct phy parameter settingLin Huang2017-11-282-31/+76
* rockchip/rk3399: mipi: Fix LOOP_DIV_HIGH_SEL to be 4 bits wideLin Huang2017-11-281-1/+1
* intel/common/block: Add SKL CSME device IDSubrata Banik2017-11-281-0/+1
* AMD platforms: Fix ASL comment that implies "\_SB" is southbridgeMartin Roth2017-11-281-1/+1
* soc/intel/cannonlake: Add PM methods to power gate SD card controllerVaibhav Shankar2017-11-231-0/+17
* soc/intel/cannonlake: Invoke pmc and hard reset only if CSE fails to resetJohn Zhao2017-11-231-1/+3
* Constify struct cpu_device_id instancesJonathan Neuschäfer2017-11-239-9/+9
* soc/amd/common: Include appropriate headers in dimm_spd.hMarc Jones2017-11-231-0/+4
* soc/amd/stoneyridge: Get entire DDR4 SPDMarc Jones2017-11-232-1/+6
* Create SOC description file soc.aslRichard Spiegel2017-11-223-0/+28
* src/soc/intel/apollolake: move TCO1 disable into bootblockVadim Bendebury2017-11-212-11/+7
* soc/amd/stoneyridge: Add ELOG to SMMJohn E. Kabat Jr2017-11-211-0/+68
* amd/stoneyridge/spi: Fix reads greater than 5 bytesMarshall Dawson2017-11-211-4/+4
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