index
:
coreboot.git
24.02_branch
4.1
4.10_branch
4.11_branch
4.12_branch
4.14_branch
4.15_branch
4.16_branch
4.18_branch
4.19_branch
4.2
4.20_branch
4.22_branch
4.3
4.4
4.8_branch
classic-2014.10
coreboot-v1
coreboot-v3
main
master
rampayload
Coreboot firmware sources
coreboot
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
src
/
southbridge
/
amd
/
cimx
/
sb900
/
Kconfig
Commit message (
Expand
)
Author
Age
Files
Lines
*
cpu/nb/sb: Remove fam12
Joe Moore
2019-11-20
1
-54
/
+0
*
sb/amd/cimx/sb[89]00: Use CF9 reset
Nico Huber
2018-10-22
1
-1
/
+2
*
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-31
1
-4
/
+0
*
Remove empty lines at end of file
Elyes HAOUAS
2015-06-08
1
-1
/
+0
*
Remove address from GPLv2 headers
Patrick Georgi
2015-05-21
1
-1
/
+1
*
Kconfig whitespace fixes
Martin Roth
2015-04-28
1
-12
/
+12
*
AGESA: Move config parameters for non-volatile S3 data
Kyösti Mälkki
2014-06-25
1
-16
/
+0
*
Correct file permissions.
Idwer Vollering
2013-12-07
1
-0
/
+0
*
AMD southbridges: Move HAVE_HARD_RESET
Kyösti Mälkki
2013-06-17
1
-0
/
+1
*
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2013-03-01
1
-1
/
+1
*
AMD S3: Introduce Kconfig variable 'S3_DATA_SIZE'
Zheng Bao
2013-02-21
1
-0
/
+8
*
AMD S3: Change S3_VOLATILE_POS to S3_DATA_POS
Zheng Bao
2013-02-19
1
-1
/
+1
*
AMD S3: Fix typo vol*a*tile in southbridge Kconfig
Zheng Bao
2013-02-18
1
-1
/
+1
*
AMD S3: The offset of the nv storage depends on config.h
Zheng Bao
2012-08-30
1
-0
/
+9
*
AMD F14 southbridge update
Kerry She
2011-09-07
1
-0
/
+2
*
Addition of Family12/SB900 wrapper code
efdesign98
2011-06-28
1
-0
/
+54