coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	device/pci: Fix PCI accessor headers	Kyösti Mälkki	2019-03-01	1	-0/+1
*	AGESA/binaryPI: Drop invalid AMD_AGESA_BOLTON	Kyösti Mälkki	2019-01-14	1	-1/+0
*	reset: Finalize move to new API	Nico Huber	2018-10-31	1	-0/+35
*	src/southbridge: Use "foo bar" instead of "foo bar"	Elyes HAOUAS	2018-07-09	2	-4/+4
*	sb/amd/common: Get rid of device_t	Elyes HAOUAS	2018-05-20	1	-2/+2
*	AGESA f15 cimx/sb700: Remove unused chips code	Kyösti Mälkki	2018-01-24	1	-1/+0
*	AGESA binaryPI: Consolidate and fix sleep states	Kyösti Mälkki	2017-08-23	1	-0/+40
*	src/amd: Add common definition of AMD ACPI MMIO address	Timothy Pearson	2017-01-05	1	-0/+22
*	src/southbridge: Code formating	Elyes HAOUAS	2016-08-31	1	-1/+1
*	southbridge/amd: add support for Bolton FCH	Felix Held	2015-11-20	1	-0/+1
*	tree: drop last paragraph of GPL copyright header	Patrick Georgi	2015-10-31	2	-8/+0
*	southbridge/amd/pi: Add support for new AMD southbridge Kern	WANG Siyuan	2015-06-13	1	-0/+1
*	Remove address from GPLv2 headers	Patrick Georgi	2015-05-21	2	-2/+2
*	kbuild: automatically include southbridges	Stefan Reinauer	2015-04-27	3	-0/+259