coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	nb,sb/amd/pi/*/pci_devs: drop unused PCI device IDs	Felix Held	2023-12-20	1	-9/+0
*	nb,sb/amd/pi/*/pci_devs: drop unused BUS0 define	Felix Held	2023-12-17	1	-2/+0
*	sb/amd/pi/hudson: remove unused Bolton PI FCH code	Felix Held	2021-04-11	1	-25/+0
*	sb/amd///pci_devs.h: Reduce the difference	Elyes HAOUAS	2020-10-26	1	-20/+22
*	treewide: Remove "this file is part of" lines	Patrick Georgi	2020-05-11	1	-1/+0
*	src/southbridge: Use SPDX for GPL-2.0-only files	Angel Pons	2020-04-04	1	-13/+2
*	src (minus soc and mainboard): Remove copyright notices	Patrick Georgi	2020-03-17	1	-1/+0
*	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	Julius Werner	2019-03-08	1	-2/+2
*	amd/pi: Add AMD fam16h TPM ACPI path support	Philipp Deppenwiese	2017-05-11	1	-0/+1
*	amd/pi/hudson: Clean up whitespace in header files	Marshall Dawson	2017-04-26	1	-75/+75
*	tree: drop last paragraph of GPL copyright header	Patrick Georgi	2015-10-31	1	-4/+0
*	Remove address from GPLv2 headers	Patrick Georgi	2015-05-21	1	-1/+1
*	southbridge/amd/pi: Add the bolton definitions	Dave Frodin	2015-02-05	1	-0/+30
*	southbridge/amd/pi: Rename Avalon to Hudson	Dave Frodin	2015-01-27	1	-0/+96