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path: root/src/southbridge/intel/bd82x6x/azalia.c
Commit message (Expand)AuthorAgeFilesLines
* sb/intel/bd82x6x: assign PCH HDA controller ops in chipset devicetreeFelix Held2023-11-181-9/+1
* src: Make PCI ID define names shorterFelix Singer2022-03-071-1/+1
* device/azalia_device: Drop unused function parameterAngel Pons2021-11-111-1/+1
* sb/intel/bd82x6x: Use `azalia_codecs_init()`Angel Pons2021-11-111-96/+1
* sb/intel/bd82x6x: Remove unused typedefAngel Pons2021-11-111-2/+0
* sb/intel: Use `azalia_program_verb_table()` functionAngel Pons2021-11-111-19/+2
* sb/intel: Replace bad uses of `find_resource`Angel Pons2021-11-041-1/+1
* src/soc to src/superio: Fix spelling errorsMartin Roth2021-10-051-1/+1
* nb/intel/sandybridge: Add x86_64 supportPatrick Rudolph2021-06-151-1/+1
* azalia: Use `azalia_enter_reset` functionAngel Pons2020-12-171-3/+2
* azalia: Use `azalia_exit_reset` functionAngel Pons2020-12-171-2/+1
* azalia: Make `azalia_find_verb` parametricAngel Pons2020-12-171-1/+1
* azalia: Drop unused parameter from `azalia_find_verb`Angel Pons2020-12-171-1/+1
* azalia: Make `find_verb` function non-staticAngel Pons2020-12-171-19/+1
* azalia: Make `set_bits` function non-staticAngel Pons2020-12-171-29/+2
* azalia: Use `HDA_GCTL_CRST` macro as unset-maskAngel Pons2020-11-021-1/+1
* azalia: Treat all negative return values as errorsAngel Pons2020-11-021-7/+7
* {sb/intel/*/azalia.c,device/azalia_device.c}: Reduce differencesElyes HAOUAS2020-08-171-29/+20
* sb/intel/bd82x6x: Use <device/azalia_device.h> registersElyes HAOUAS2020-08-171-16/+12
* sb/intel/bd82x6x: Use PCI bitwise opsAngel Pons2020-06-101-40/+14
* src: Use pci_dev_ops_pci where applicableAngel Pons2020-06-061-5/+1
* sb/intel/bd82x6x: Fix 16-bit read/write PCI_COMMAND registerElyes HAOUAS2020-06-021-2/+1
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* Drop explicit NULL initializations from `device_operations`Elyes HAOUAS2020-04-051-1/+0
* src/southbridge: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-041-13/+2
* src (minus soc and mainboard): Remove copyright noticesPatrick Georgi2020-03-171-3/+0
* southbridge/intel: Tidy up preprocessor and headersKyösti Mälkki2019-08-211-0/+2
* sb/intel/bd82x6x: Add and use more RCBA definesPatrick Rudolph2019-07-181-2/+2
* {northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem()Subrata Banik2019-03-211-13/+1
* device/mmio.h: Add include file for MMIO opsKyösti Mälkki2019-03-041-1/+1
* src: Use "foo **bar" instead of "foo ** bar"Elyes HAOUAS2019-01-071-1/+1
* Revert "sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location"Arthur Heymans2018-06-211-1/+0
* sb/intel/bd82x6x: Get rid of device_tElyes HAOUAS2018-06-041-1/+2
* sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common locationArthur Heymans2018-02-271-0/+1
* device: acpi_name() should take a const struct deviceAaron Durbin2017-09-141-1/+1
* sb/intel/bd82x6x: Fill in acpi_namePatrick Rudolph2017-06-271-0/+6
* src/southbridge: Code formatingElyes HAOUAS2016-08-311-2/+2
* tree: drop last paragraph of GPL copyright headerPatrick Georgi2015-10-311-4/+0
* Remove address from GPLv2 headersPatrick Georgi2015-05-211-1/+1
* x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointerKevin Paul Herbert2015-02-151-10/+11
* azalia: Shrink boilerplateVladimir Serbinenko2014-09-131-5/+1
* southbridge: Trivial - drop trailing blank lines at EOFEdward O'Callaghan2014-07-081-1/+0
* intel/sandybridge intel/bd82x6x: remove explicit pcie config accessesKyösti Mälkki2013-08-091-8/+8
* Remove unnecessary space characters.Andrew Wu2013-08-021-2/+2
* Intel HD Audio: clean up initialization codeStefan Reinauer2013-03-171-23/+20
* GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel2013-03-011-1/+1
* bd82x6x: Add beep commandsDylan Reid2012-08-071-0/+12
* bd82x6x: Convert all PCI ID lists to new schemeStefan Reinauer2012-07-241-9/+5
* Add support for Intel Panther Point PCHStefan Reinauer2012-04-041-0/+367
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