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path: root/src/southbridge/intel/bd82x6x/me.c
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* src: Retype option API to use unsigned integersAngel Pons2021-05-061-3/+3
* sb/intel/bd82x6x: Use {get,set}_int_optionAngel Pons2021-04-211-4/+3
* sb/intel/bd82x6x: Turn ME PCI register structs into unionsAngel Pons2021-03-011-6/+6
* sb/intel/bd82x6x: Move ME SMM code into a separate fileAngel Pons2021-02-131-77/+0
* sb/intel/bd82x6x: Relocate some static functionsAngel Pons2021-02-131-84/+85
* sb/intel/bd82x6x: Support ME Soft Temporary Disable ModeEvgeny Zinoviev2021-02-071-1/+61
* sb/intel/{bd82x6x,ibexpeak}: hide MEI if ME inoperableJames Ye2021-02-061-1/+6
* sb,soc/intel: Drop unnecessary headersKyösti Mälkki2020-12-221-4/+0
* sb/intel/bd82x6x: Only check device ID in `intel_me_finalize_smm`Angel Pons2020-12-111-4/+4
* sb/intel/bd82x6x: Make me_common.c a compilation unitAngel Pons2020-12-101-3/+0
* sb/intel/bd82x6x: Factor out common ME functionsAngel Pons2020-08-291-383/+5
* src: Remove unused '<halt.h>'Elyes HAOUAS2020-08-181-1/+0
* sb/intel/bd82x6x: Align mei_recv_msg() functionsAngel Pons2020-06-241-4/+4
* sb/intel/bd82x6x: Use PCI bitwise opsAngel Pons2020-06-101-5/+2
* sb/intel/bd82x6x: Align some ME functionsAngel Pons2020-06-071-3/+3
* src: Use pci_dev_ops_pci where applicableAngel Pons2020-06-061-5/+1
* sb/intel/bd82x6x: Remove dead codeAngel Pons2020-06-051-33/+0
* sb/intel/bd82x6x: Fix 16-bit read/write PCI_COMMAND registerElyes HAOUAS2020-06-021-7/+5
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* acpi: Move ACPI table support out of arch/x86 (3/5)Furquan Shaikh2020-05-021-1/+1
* src/southbridge: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-041-14/+2
* src (minus soc and mainboard): Remove copyright noticesPatrick Georgi2020-03-171-1/+0
* arch/x86: Replace some __SMM__ guardsKyösti Mälkki2019-11-091-15/+10
* ELOG: Avoid some preprocessor useKyösti Mälkki2019-11-091-3/+1
* sb,soc/intel: Reduce preprocessor use with ME debuggingKyösti Mälkki2019-11-081-14/+11
* src/southbridge: change "unsigned" to "unsigned int"Martin Roth2019-10-301-4/+4
* {northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem()Subrata Banik2019-03-211-12/+1
* coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner2019-03-081-5/+5
* device/mmio.h: Add include file for MMIO opsKyösti Mälkki2019-03-041-1/+1
* device/pci: Fix PCI accessor headersKyösti Mälkki2019-03-011-0/+1
* src: Get rid of duplicated includesElyes HAOUAS2018-11-161-5/+3
* sb/intel/bd82x6x: Don't use device_tElyes HAOUAS2018-09-211-7/+7
* Revert "sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location"Arthur Heymans2018-06-211-1/+0
* sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common locationArthur Heymans2018-02-271-0/+1
* southbridge/intel: add IS_ENABLED() around Kconfig symbol referencesMartin Roth2017-07-161-5/+5
* intel PCI ops: Remove explicit PCI MMCONF accessKyösti Mälkki2016-12-061-1/+1
* src/southbridge: Code formatingElyes HAOUAS2016-08-311-1/+1
* tree: drop last paragraph of GPL copyright headerPatrick Georgi2015-10-311-4/+0
* devicetree: Discriminate device ops scan_bus()Kyösti Mälkki2015-06-041-1/+0
* Remove address from GPLv2 headersPatrick Georgi2015-05-211-2/+1
* x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointerKevin Paul Herbert2015-02-151-9/+9
* Replace hlt with halt()Patrick Georgi2014-12-021-2/+2
* intel boards: Use acpi_is_wakeup_s3()Kyösti Mälkki2014-06-211-4/+1
* intel/sandybridge intel/bd82x6x: remove explicit pcie config accessesKyösti Mälkki2013-08-091-5/+5
* Drop some duplicates of PCI-e config functionsKyösti Mälkki2013-07-101-1/+1
* x86: Unify arch/io.h and arch/romcc_io.hStefan Reinauer2013-03-221-1/+0
* elog: add extended management engine eventDuncan Laurie2012-11-081-9/+19
* Log event for abnormal management engine statusDuncan Laurie2012-07-261-3/+4
* ME: Move ME v8 lockdown to finalize stepDuncan Laurie2012-07-261-2/+2
* Fix automatic ME detection in finalizeStefan Reinauer2012-07-241-1/+1
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