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path: root/src/southbridge/intel/bd82x6x/pch.h
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* sb/intel/bd82x6x: Follow PCH BIOS specPatrick Rudolph2023-10-091-1/+4
* sb/intel/bd82x6x,ibexpeak: Move UPRWC definitionKyösti Mälkki2023-05-141-4/+5
* sb/intel/common: Rename TCO timeoutKyösti Mälkki2022-11-281-1/+1
* sb,soc/intel: Address TCO SECOND_TO_STS name collisionKyösti Mälkki2022-11-281-1/+1
* sb,soc/intel: Apply transitional flag TCO_SPACE_NOT_YET_SPLITKyösti Mälkki2022-11-281-0/+2
* sb/intel/common: Fix GPE0 related register conflictKyösti Mälkki2022-11-171-2/+2
* treewide: Add 'IWYU pragma: export' commentElyes Haouas2022-11-031-1/+1
* sb/intel: Drop outdated SMBus I/O BAR commentAngel Pons2021-05-161-8/+0
* sb/intel/bd82x6x: Clean up early_thermal.cAngel Pons2021-01-301-0/+1
* sb/intel/bd82x6x: Correct xHCI sleep workaroundAngel Pons2021-01-131-1/+8
* sb/intel/bd82x6x: Drop invalid SATA registersAngel Pons2020-12-111-40/+0
* sb/intel/bd82x6x: Make `pch_silicon_supported` staticAngel Pons2020-08-121-1/+0
* sb/intel/bd82x6x: Remove incorrect RCBA registersAngel Pons2020-08-121-20/+0
* sb/intel: Remove inexistent references to IDE controllerAngel Pons2020-08-121-2/+1
* sb/intel: Define CONFIG_FIXED_SMBUS_IO_BASEAngel Pons2020-07-201-2/+1
* device/smbus_host: Declare common early SMBus prototypesKyösti Mälkki2020-06-221-4/+0
* sb/intel: Clean up some SMI enablesKyösti Mälkki2020-06-161-2/+0
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* acpi: Move ACPI table support out of arch/x86 (3/5)Furquan Shaikh2020-05-021-1/+1
* sb/intel/bd82x6x/sata: Don't hard-code valuesFelix Singer2020-04-071-1/+0
* src/southbridge: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-041-13/+2
* src (minus soc and mainboard): Remove copyright noticesPatrick Georgi2020-03-171-2/+0
* sb/intel/common: Declare common smbus_base() and enable_smbus()Kyösti Mälkki2020-01-141-1/+0
* sb/intel/common: Add smbus_set_slave_addr()Kyösti Mälkki2020-01-091-1/+0
* sb/intel/*: Remove romcc guardsArthur Heymans2019-12-141-2/+0
* sb/intel/bd82x6x: Make the pch_enable_lpc hook optionalArthur Heymans2019-11-181-0/+3
* nb/intel/sandybridge: Make the mainboard_rcba_config hook optionalArthur Heymans2019-11-181-1/+3
* src/southbridge: change "unsigned" to "unsigned int"Martin Roth2019-10-301-1/+1
* intel/pci: Utilise pci_def.h for PCI_BRIDGE_CONTROLKyösti Mälkki2019-10-011-4/+0
* sb/intel/bd82x6x: Use common final SPI OPs setupArthur Heymans2019-09-301-41/+0
* southbridge/intel: Tidy up preprocessor and headersKyösti Mälkki2019-08-211-12/+8
* sb/intel/bd82x6x: Add and use more RCBA definesPatrick Rudolph2019-07-181-13/+74
* sb/intel/*: Delete early_spiPatrick Rudolph2019-05-291-1/+0
* nb/intel/sandybridge: Move DMI init codePatrick Rudolph2019-05-161-0/+2
* sb/intel/sandybridge/early_pch: Make DMI init more readablePatrick Rudolph2019-05-161-0/+2
* nb/intel/sandybridge: Move southbridge code to bd82x6xPatrick Rudolph2019-04-181-0/+1
* sb/intel/bd82x6x: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIBPatrick Rudolph2019-04-161-1/+0
* coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner2019-03-081-2/+2
* sb/intel: Use common RCBA MACROsPeter Lemenkov2019-01-141-3/+0
* sb/intel/bd828x6x: Make CONFIG_ELOG=y compileArthur Heymans2018-12-291-3/+0
* sb/intel/common: Create a common PCH finalise implementationTristan Corrick2018-12-031-4/+0
* sb/intel: Deduplicate vbnv_cmos_failed and rtc_initPatrick Rudolph2018-11-071-3/+0
* mb/lenovo/*/romstage: Use macros instead of magic numbersPeter Lemenkov2018-10-181-0/+2
* sb/intel/bd82x6x: Don't use device_tElyes HAOUAS2018-09-211-1/+1
* sb/intel/bd82x6x: Fix watchdogPatrick Rudolph2018-07-281-0/+3
* sb/intel/common: Make RCBA manipulation MACROs commonArthur Heymans2018-06-211-16/+1
* Revert "sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location"Arthur Heymans2018-06-211-0/+149
* src: Remove space after `defined`Elyes HAOUAS2018-05-241-1/+1
* Revert "model_206ax: Use parallel MP init"Arthur Heymans2018-04-111-0/+3
* model_206ax: Use parallel MP initArthur Heymans2018-04-111-3/+0
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