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path: root/src/southbridge/intel/bd82x6x/pch.h
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* sb/intel/bd82x6x: Add TCO_Lock in finalize stepDennis Wassenberg2016-12-081-0/+3
* southbridge/intel/bd82x6x: transition away from device_tAntonello Dettori2016-09-041-1/+1
* chromeos mainboards: remove chromeos.aslAaron Durbin2016-07-301-0/+6
* southbridge/intel/bd82x6x: use common Intel ACPI hardware definitionsAaron Durbin2016-07-151-7/+2
* southbridge/intel/bd82x6x: Use common gpio.cPatrick Rudolph2016-02-181-16/+0
* sb/intel/bd82x6x: Assign unique bus/dev/fn for I/O APIC + HPETsNico Huber2015-11-041-0/+7
* tree: drop last paragraph of GPL copyright headerPatrick Georgi2015-10-311-4/+0
* Create i945-ivy smm tseg init based on ivy code.Vladimir Serbinenko2015-06-091-5/+0
* Migrate 206ax to SMM_MODULESVladimir Serbinenko2015-05-281-0/+5
* Remove address from GPLv2 headersPatrick Georgi2015-05-211-1/+1
* intel SMI handlers: Refactor GPI SMI/SCI routingKyösti Mälkki2015-04-281-0/+6
* southbrige/intel/bd82x6x: add XHCI overcurrent map configNicolas Reinecke2015-04-201-0/+1
* southbrige/intel/bd82x6x: XHCI replace magic valuesNicolas Reinecke2015-04-191-0/+4
* x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointerKevin Paul Herbert2015-02-151-0/+4
* southbridge/intel/bd82x6x native usb init: replace some magic valuesNicolas Reinecke2015-01-311-0/+6
* sandy/ivy/nehalem: Remerge interrupt handlingVladimir Serbinenko2014-11-231-0/+1
* sandy/ivy native: dedup romstage.c main()Vladimir Serbinenko2014-10-241-0/+4
* bd82x6x: Consolidate early native USB initVladimir Serbinenko2014-10-171-0/+11
* bd82x6x: Move common bd82x6x S3 detect to bd82x6x code.Vladimir Serbinenko2014-10-161-0/+1
* sandy/ivybridge: Native raminit.Vladimir Serbinenko2014-07-291-0/+2
* Intel BD82x6x: LPC: Unify I/O APIC setupPaul Menzel2013-06-031-0/+1
* Drop prototype guarding for romccStefan Reinauer2013-05-101-1/+1
* Add bd82x6x PCH functions to SMMMarc Jones2013-03-171-3/+5
* Add Intel Panther Point USB3 initializationMarc Jones2013-03-091-1/+6
* GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel2013-03-011-1/+1
* SPI: Add early romstage SPI driver using hardware sequencingDuncan Laurie2012-11-121-0/+15
* SPI: Add Fast Read to the OPMENU for locked down SPIDuncan Laurie2012-11-121-2/+2
* PCH: Add register descriptions used by IGD OpRegionStefan Reinauer2012-11-091-0/+2
* hpet: common ACPI generationPatrick Georgi2012-10-081-1/+0
* Perform additional programming requirements for SATAStefan Reinauer2012-08-041-0/+2
* SATA: Add option to configure gen3 transmitterDuncan Laurie2012-07-261-0/+4
* ELOG: Log boot-time events found in southbridgeDuncan Laurie2012-07-251-0/+5
* CPU: Set flex ratio to nominal TDP ratio in bootblockDuncan Laurie2012-07-241-0/+2
* Add an option to enable PCIe root port coalescingDuncan Laurie2012-05-011-3/+18
* Add support for Intel Panther Point PCHStefan Reinauer2012-04-041-0/+514
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