coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	northbridge/intel/fsp_*: Remove legacy SoCs	zaolin	2018-11-19	11	-1950/+0
*	src: Get rid of unneeded whitespace	Elyes HAOUAS	2018-06-14	1	-1/+1
*	src/southbridge: Serialize methods with named objects inside	Martin Roth	2018-05-09	1	-1/+1
*	ACPI: Fix IASL Warning about unused method for _TZ checks	Martin Roth	2015-12-10	1	-2/+2
*	tree: drop last paragraph of GPL copyright header	Patrick Georgi	2015-10-31	11	-44/+0
*	Revert "Remove sandybridge and ivybridge FSP code path"	Martin Roth	2015-10-22	11	-0/+1994
*	Remove sandybridge and ivybridge FSP code path	Alexandru Gagniuc	2015-10-03	11	-1994/+0
*	Kill ENABLE_TPM.	Vladimir Serbinenko	2015-05-21	1	-24/+0
*	Remove address from GPLv2 headers	Patrick Georgi	2015-05-21	11	-22/+11
*	intel: Remove IRQ1 from possible PIRQ assignemnt.	Vladimir Serbinenko	2014-11-25	1	-8/+8
*	fsp_sandybridge: Move to per-device ACPI.	Vladimir Serbinenko	2014-10-18	1	-2/+2
*	southbridge,ASL: Trivial - drop trailing blank lines at EOF	Edward O'Callaghan	2014-07-17	6	-6/+0
*	intel/*bd82x6x/acpi/pch.asl: Correct name of field unit to GP03	Paul Menzel	2014-04-11	1	-1/+1
*	Add Intel FSP bd82x6x southbridge support	Marc Jones	2013-12-04	11	-0/+2035