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coreboot.git
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4.1
4.10_branch
4.11_branch
4.12_branch
4.14_branch
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4.18_branch
4.19_branch
4.2
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4.22_branch
4.3
4.4
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path:
root
/
src
/
southbridge
/
intel
/
i82371eb
/
i82371eb.c
Commit message (
Expand
)
Author
Age
Files
Lines
*
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-05-11
1
-1
/
+0
*
treewide: replace GPLv2 long form headers with SPDX header
Patrick Georgi
2020-05-06
1
-12
/
+1
*
treewide: Move "is part of the coreboot project" line in its own comment
Patrick Georgi
2020-05-06
1
-2
/
+1
*
src (minus soc and mainboard): Remove copyright notices
Patrick Georgi
2020-03-17
1
-1
/
+0
*
Revert "i82371eb: Drop support for older PIIX chips"
Patrick Georgi
2020-03-06
1
-2
/
+17
*
i82371eb: Drop support for older PIIX chips
Keith Hui
2020-03-03
1
-17
/
+2
*
intel/i82371eb: Drop unused code
Kyösti Mälkki
2020-01-02
1
-7
/
+0
*
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-31
1
-4
/
+0
*
Remove address from GPLv2 headers
Patrick Georgi
2015-05-21
1
-1
/
+1
*
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2013-03-01
1
-1
/
+1
*
Please bear with me - another rename checkin. This qualifies as trivial, no
Stefan Reinauer
2008-01-18
1
-1
/
+1
*
Improve support for the Intel 82371FB/SB/AB/EB/MB southbridge(s):
Uwe Hermann
2007-11-30
1
-29
/
+30
*
Intel 82371EB: Add IDE init support.
Uwe Hermann
2007-05-29
1
-13
/
+14
*
Init for the Intel 82371EB southbridge: make all ROM/BIOS regions
Uwe Hermann
2007-05-27
1
-1
/
+31
*
Correct the RAM checking code to _not_ check the range from 640 KB - 1 MB,
Uwe Hermann
2007-05-03
1
-0
/
+32