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path: root/src/southbridge/intel/i82371eb/i82371eb.h
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* {include,mb,soc,sb,vendorcode}: Make hexadecimal notation consistentSubrata Banik2020-09-011-3/+3
* sb/intel/i82371eb: Add #defines for DEVRESx registersKeith Hui2020-07-261-0/+10
* sb/intel/i82371eb: Clean up PM register #definesKeith Hui2020-07-261-8/+7
* device/smbus_host: Declare common early SMBus prototypesKyösti Mälkki2020-06-221-4/+0
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi2020-05-061-12/+1
* treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi2020-05-061-2/+1
* src (minus soc and mainboard): Remove copyright noticesPatrick Georgi2020-03-171-1/+0
* sb/intel/i82371eb: Add PIIX4 definitionsKeith Hui2020-01-141-0/+5
* sb/intel/common: Declare common smbus_base() and enable_smbus()Kyösti Mälkki2020-01-141-1/+0
* asus/{p2b-x,p3b-f},intel/i440bx: Move mainboard_romstage_entry()Kyösti Mälkki2020-01-121-0/+1
* intel/i82371eb: Drop unused codeKyösti Mälkki2020-01-021-8/+0
* sb/intel/*: Remove romcc guardsArthur Heymans2019-12-141-2/+0
* southbridge/intel: Tidy up preprocessor and headersKyösti Mälkki2019-08-211-6/+10
* arch/io.h: Drop unnecessary includeKyösti Mälkki2019-03-041-1/+0
* sb/intel/i82371eb: Get rid of device_tElyes HAOUAS2018-05-141-1/+1
* tree: drop last paragraph of GPL copyright headerPatrick Georgi2015-10-311-4/+0
* Remove address from GPLv2 headersPatrick Georgi2015-05-211-1/+1
* i82371eb & qemu: Move to per-device ACPI.Vladimir Serbinenko2014-12-181-0/+1
* Drop prototype guarding for romccStefan Reinauer2013-05-101-10/+3
* GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel2013-03-011-1/+1
* In 2007 Adrian Reber suggested that we drop ASSEMBLY in favor of __ASSEMBLER__.Stefan Reinauer2011-04-101-1/+1
* Get rid of some unneeded function prototypes in romstage.c files.Uwe Hermann2010-12-071-0/+6
* Tobias Diedrich wrote:Tobias Diedrich2010-11-291-0/+2
* After finding the missing bit poweroff works now.Tobias Diedrich2010-11-271-2/+49
* Remove various .c #includes from Intel 440BX/82371EB boards.Uwe Hermann2010-10-091-0/+9
* Make ASUS P3B-F RAM init actually work by enabling SPD access.Uwe Hermann2010-09-191-0/+1
* drop __ROMCC__ define checks.. __PRE_RAM__ is what the code should be looking...Stefan Reinauer2010-03-281-1/+1
* Split the two usages of __ROMCC__:Myles Watson2009-11-061-1/+1
* Add few missing prototypes, and remove few unused (thus lonelly) variables.Maciej Pijanka2009-10-271-0/+1
* Please bear with me - another rename checkin. This qualifies as trivial, noStefan Reinauer2008-01-181-1/+1
* Improve support for the Intel 82371FB/SB/AB/EB/MB southbridge(s):Uwe Hermann2007-11-301-10/+41
* Intel 82371EB: Some code simplifications (trivial).Uwe Hermann2007-06-031-1/+0
* Intel 82371EB: Add IDE init support.Uwe Hermann2007-05-291-6/+17
* Init for the Intel 82371EB southbridge: make all ROM/BIOS regionsUwe Hermann2007-05-271-0/+2
* Correct the RAM checking code to _not_ check the range from 640 KB - 1 MB,Uwe Hermann2007-05-031-0/+32
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