coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	treewide: Remove "this file is part of" lines	Patrick Georgi	2020-05-11	1	-1/+0
*	sb/intel/i82801jx: Fix 16-bit read/write PCI_COMMAND register	Elyes HAOUAS	2020-05-01	1	-5/+1
*	src/southbridge: Use SPDX for GPL-2.0-only files	Angel Pons	2020-04-04	1	-14/+2
*	src (minus soc and mainboard): Remove copyright notices	Patrick Georgi	2020-03-17	1	-3/+0
*	src/southbridge: Remove unused <stdlib.h>	Elyes HAOUAS	2019-12-19	1	-1/+0
*	southbridge/intel: Tidy up preprocessor and headers	Kyösti Mälkki	2019-08-21	1	-0/+1
*	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	Julius Werner	2019-03-08	1	-1/+1
*	device/pci: Fix PCI accessor headers	Kyösti Mälkki	2019-03-01	1	-0/+1
*	device: Use pcidev_path_on_root()	Kyösti Mälkki	2019-01-06	1	-1/+1
*	device: Use pcidev_on_root()	Kyösti Mälkki	2019-01-06	1	-4/+4
*	sb/intel/i82801[ij]x: do not set Chipset Initialization Register (CIR) 5	Stefan Tauner	2018-08-16	1	-1/+1
*	sb/intel/i82801[ij]x: use (more) RCBA register names instead of magic numbers	Stefan Tauner	2018-08-14	1	-8/+8
*	sb/intel/i82801jx: Get rid of device_t	Elyes HAOUAS	2018-05-24	1	-5/+5
*	I82801JX: Add IS_ENABLED around config options	Martin Roth	2017-07-21	1	-1/+1
*	sb/intel/i82801jx: Add correct PCI ids and change names	Arthur Heymans	2017-07-21	1	-0/+235