summaryrefslogtreecommitdiffstats
path: root/src/southbridge/intel/lynxpoint/chip.h
Commit message (Expand)AuthorAgeFilesLines
* sb/intel/lynxpoint: Generate the ACPI FADT with a common functionTristan Corrick2018-11-161-0/+3
* src: Add missing include <stdint.h>Elyes HAOUAS2018-11-011-0/+2
* tree: drop last paragraph of GPL copyright headerPatrick Georgi2015-10-311-4/+0
* Remove address from GPLv2 headersPatrick Georgi2015-05-211-1/+1
* intel/lynxpoint: Allow to always route USB3 ports to XHCIStefan Reinauer2014-07-111-0/+3
* intel/lynxpoint: Add SATA DEVSLP disable optionMarc Jones2014-07-041-0/+7
* lynxpoint: Add configuration option for SATA gen3 DTLE registersShawn Nematbakhsh2013-12-211-0/+3
* lynxpoint: Add devicetree config option to force enable ASPMDuncan Laurie2013-12-211-0/+2
* lynxpoint: me: Support ICC clock enables messageDuncan Laurie2013-12-211-0/+7
* lynxpoint: Basic configuration of SerialIO devicesDuncan Laurie2013-04-011-0/+7
* haswell/lynxpoint: Use new PCH/PM helper functionsDuncan Laurie2013-03-211-3/+6
* lynxpoint: Update device IDs and clock gating setupDuncan Laurie2013-03-141-0/+5
* haswell: Add initial support for Haswell platformsAaron Durbin2013-03-141-0/+84