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path: root/src/southbridge/intel/lynxpoint/pcie.c
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* sb/intel/lynxpoint/pcie.c: Ensure OBFF is disabledAngel Pons2020-11-071-3/+3
* sb/intel/lynxpoint/pcie: Fix clock gating routineAngel Pons2020-10-241-2/+1
* haswell/lynxpoint: Align cosmetics with BroadwellAngel Pons2020-10-141-20/+26
* sb/intel/lynxpoint/pcie.c: fix typo in commentMatt DeVillier2020-10-121-1/+1
* sb/intel/lynxpoint: Set PCIe L1 substates capabilities registerMatt DeVillier2020-10-121-0/+6
* sb/intel/lynxpoint: Enable/disable AER via KconfigMatt DeVillier2020-10-121-2/+5
* src: Remove unused 'include <stddef.h>Elyes HAOUAS2020-08-181-1/+0
* sb/intel/lynxpoint: Move IOBP API to its own compilation unitAngel Pons2020-08-121-0/+1
* sb/intel/lynxpoint: Use PCI bitwise opsAngel Pons2020-08-071-40/+32
* sb/intel/lynxpoint: Consider root ports being disabled by strapAngel Pons2020-08-071-0/+36
* src: Never set ISA Enable on PCI bridgesAngel Pons2020-07-281-1/+0
* sb/intel/lynxpoint/pcie.c: Drop dead codeAngel Pons2020-07-091-11/+0
* src: Use pci_dev_ops_pci where applicableAngel Pons2020-06-061-5/+1
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* sb/intel/lynxpoint: Fix 16-bit read/write PCI_COMMAND registerElyes HAOUAS2020-05-011-12/+6
* src/southbridge: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-041-14/+2
* src (minus soc and mainboard): Remove copyright noticesPatrick Georgi2020-03-171-1/+0
* src/southbridge: change "unsigned" to "unsigned int"Martin Roth2019-10-301-1/+1
* intel/pci: Utilise pci_def.h for PCI_BRIDGE_CONTROLKyösti Mälkki2019-10-011-5/+5
* southbridge/intel: Tidy up preprocessor and headersKyösti Mälkki2019-08-211-0/+1
* {northbridge, soc, southbridge}/intel: Make use of generic set_subsystem()Subrata Banik2019-03-211-14/+1
* sb/intel/lynxpoint/pcie.c: Add more checks for NULL pointersTristan Corrick2019-01-031-16/+29
* sb/intel/lynxpoint: Handle H81 only having 6 PCIe root portsTristan Corrick2018-12-281-9/+8
* sb/intel/lynxpoint/pcie.c: Fix a mistake in a commentTristan Corrick2018-12-071-1/+1
* sb/intel/lynxpoint: Get rid of device_tElyes HAOUAS2018-06-091-12/+13
* pci: Move inline PCI functions to pci_ops.hPatrick Rudolph2018-04-201-0/+1
* southbridge/intel/lynxpoint: Fix undefined behaviorRyan Salsamendi2017-07-101-1/+3
* southbridge/intel/lynxpoint: Fix undefined behaviorRyan Salsamendi2017-07-021-1/+1
* PCI ops: Define read-modify-write routines globallyKyösti Mälkki2016-12-061-65/+42
* southbridge/intel/lynxpoint: Use common gpio.cPatrick Rudolph2016-02-231-0/+1
* tree: drop last paragraph of GPL copyright headerPatrick Georgi2015-10-311-4/+0
* Remove address from GPLv2 headersPatrick Georgi2015-05-211-1/+1
* haswell: Misc updates from 1.6.1 ref codeDuncan Laurie2013-12-211-3/+0
* lynxpoint: Add devicetree config option to force enable ASPMDuncan Laurie2013-12-211-0/+8
* lynxpoint: enable clock gatingAaron Durbin2013-12-051-0/+90
* lynxpoint: implement additional programming stepsStefan Reinauer2013-12-051-151/+201
* lynxpoint: disable pcie devices based on configAaron Durbin2013-12-051-141/+315
* lynxpoint: move all pcie device handling to pcie.cAaron Durbin2013-12-021-0/+185
* intel/lynxpoint: remove explicit pcie config accessesKyösti Mälkki2013-08-011-9/+9
* lynxpoint: Update device IDs and clock gating setupDuncan Laurie2013-03-141-5/+7
* haswell: Add initial support for Haswell platformsAaron Durbin2013-03-141-0/+273
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