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path: root/src/southbridge/intel/lynxpoint/sata.c
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* sb/lynxpoint: Fix 'dead increment'Elyes HAOUAS2019-10-211-1/+1
* southbridge/intel: Tidy up preprocessor and headersKyösti Mälkki2019-08-211-0/+1
* {northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem()Subrata Banik2019-03-211-13/+1
* device/mmio.h: Add include file for MMIO opsKyösti Mälkki2019-03-041-1/+1
* device/pci: Fix PCI accessor headersKyösti Mälkki2019-03-011-0/+1
* sb/intel/lynxpoint: Get rid of device_tElyes HAOUAS2018-06-091-2/+3
* southbridge/intel/lynxpoint: Fix undefined behaviorRyan Salsamendi2017-07-101-1/+1
* southbridge/intel/lynxpoint: Fix undefined behaviorRyan Salsamendi2017-07-021-1/+1
* src/southbridge: Add required space before opening parenthesis '('Elyes HAOUAS2016-08-281-1/+1
* tree: drop last paragraph of GPL copyright headerPatrick Georgi2015-10-311-4/+0
* Remove address from GPLv2 headersPatrick Georgi2015-05-211-1/+1
* x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointerKevin Paul Herbert2015-02-151-8/+8
* southbridge: Trivial - drop trailing blank lines at EOFEdward O'Callaghan2014-07-081-1/+0
* intel/lynxpoint: Add SATA DEVSLP disable optionMarc Jones2014-07-041-3/+7
* lynxpoint: Add configuration option for SATA gen3 DTLE registersShawn Nematbakhsh2013-12-211-0/+25
* lynxpoint: Change sata.c to get rid of #ifDuncan Laurie2013-03-211-22/+19
* haswell: more ULT/LP support and minor tweaksDuncan Laurie2013-03-141-5/+30
* lynxpoint: Update device IDs and clock gating setupDuncan Laurie2013-03-141-28/+53
* haswell: Add initial support for Haswell platformsAaron Durbin2013-03-141-0/+290