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path: root/src/southbridge/intel/lynxpoint
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* device: Use scan_static_bus() over scan_lpc_bus()Nico Huber2019-10-081-1/+1
* acpi_table_header: Replace hard-coded revision via macro and functionHimanshu Sahdev2019-10-041-1/+1
* intel/pci: Utilise pci_def.h for PCI_BRIDGE_CONTROLKyösti Mälkki2019-10-012-9/+5
* drivers/elog: Add elog_boot_notify()Kyösti Mälkki2019-09-131-4/+1
* southbridge/intel: Tidy up preprocessor and headersKyösti Mälkki2019-08-2110-19/+12
* soc/intel: Rename some SMM support functionsKyösti Mälkki2019-08-152-12/+5
* cpu/x86: Separate save_state struct headersKyösti Mälkki2019-08-131-0/+1
* soc,southbridge/intel: Avoid preprocessor with HAVE_SMI_HANDLERKyösti Mälkki2019-07-131-3/+1
* arch/x86: Avoid HAVE_SMI_HANDLER conditional with smm-classKyösti Mälkki2019-07-091-3/+3
* sb/intel/lynxpoint: Use common final SPI OPs setupArthur Heymans2019-07-082-40/+2
* sb/intel/*: Delete early_spiPatrick Rudolph2019-05-293-110/+1
* {bd82x6x,i82801gx,ibexpeak,lynxpoint}: Remove dead code and use macroElyes HAOUAS2019-05-131-2/+2
* sb/{ICH7,NM10,PCH}: Use common watchdog_off functionElyes HAOUAS2019-05-073-57/+1
* Fix code that would trip -Wtype-limitsJulius Werner2019-05-061-1/+1
* {soc, southbridge} : Correct typo in commentFrans Hendriks2019-05-031-1/+1
* sb/intel/lynxpoint: Enable LPC/SIO setup in bootblockArthur Heymans2019-04-233-5/+4
* nb/intel/haswell: Add an option for where verstage startsArthur Heymans2019-04-212-0/+6
* cpu/intel/haswell: Use C_ENVIRONMENT_BOOTBLOCKArthur Heymans2019-04-214-7/+4
* sb/intel/lynxpoint: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIBPatrick Rudolph2019-04-132-21/+3
* src: Use include <delay.h> when appropriateElyes HAOUAS2019-04-062-4/+2
* sb/intel/lynxpoint: Remove PCI bridge functionKyösti Mälkki2019-03-212-138/+0
* {northbridge, soc, southbridge}/intel: Make use of generic set_subsystem()Subrata Banik2019-03-211-14/+1
* {northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem()Subrata Banik2019-03-218-97/+8
* src: Use 'include <string.h>' when appropriateElyes HAOUAS2019-03-203-3/+1
* src: Drop unused 'include <device/pciexp.h>'Elyes HAOUAS2019-03-161-1/+0
* coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner2019-03-088-28/+28
* device/mmio.h: Add include file for MMIO opsKyösti Mälkki2019-03-047-6/+7
* arch/io.h: Drop unnecessary includeKyösti Mälkki2019-03-045-5/+0
* sb/intel/common/firmware: Don't touch descriptor regionMario Scheithauer2019-03-031-4/+0
* device/pci: Fix PCI accessor headersKyösti Mälkki2019-03-0115-0/+15
* ACPI: Correct asl_compiler_revision valueElyes HAOUAS2019-02-211-1/+3
* sb/intel: Use common RCBA MACROsPeter Lemenkov2019-01-141-19/+2
* sb/intel: Check for NULL-return of pcidev_on_root()Nico Huber2019-01-131-3/+6
* cpu/intel: Use the common code to initialize the romstage timestampsArthur Heymans2019-01-092-25/+0
* intel/lynxpoint: Fix spellingKyösti Mälkki2019-01-072-2/+2
* src: Use "foo **bar" instead of "foo ** bar"Elyes HAOUAS2019-01-071-1/+1
* Kconfig: Unify power-after-failure optionsNico Huber2019-01-064-6/+4
* device: Use pcidev_on_root()Kyösti Mälkki2019-01-066-7/+7
* sb/intel/*: Use common files for PCIe ACPIArthur Heymans2019-01-033-239/+1
* sb/intel/lynxpoint/pcie.c: Add more checks for NULL pointersTristan Corrick2019-01-031-16/+29
* sb/intel/lynxpoint: Remove incomplete SATA ACPI codeTristan Corrick2019-01-031-52/+2
* sb/intel/lynxpoint: Handle H81 only having 6 PCIe root portsTristan Corrick2018-12-283-9/+19
* sb/intel/lynxpoint: Don't force state keep after power failTristan Corrick2018-12-191-1/+0
* southbridge: Remove useless include <device/pci_ids.h>Elyes HAOUAS2018-12-194-4/+0
* sb/intel/lynxpoint/pcie.c: Fix a mistake in a commentTristan Corrick2018-12-071-1/+1
* src/southbridge: Get rid of device_tElyes HAOUAS2018-12-073-18/+50
* elog: make elog's SMM handler code follow everything elsePatrick Georgi2018-12-051-2/+2
* sb/intel/lynxpoint: Move `HAVE_SMI_HANDLER` to southbridge KconfigTristan Corrick2018-12-031-0/+1
* sb/intel/common: Create a common PCH finalise implementationTristan Corrick2018-12-036-70/+10
* sb/intel/lynxpoint: Ensure the finalise handler is calledTristan Corrick2018-12-032-14/+6