| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | soc/mediatek/mt8192: initialize DRAM using vendor reference code | Huayang Duan | 2021-03-08 | 1 | -0/+1 |
| * | vendorcode/eltan: Add vendor code for measured and verified boot | Frans Hendriks | 2019-06-04 | 1 | -0/+1 |
| * | soc/cavium: Integrate BDK files into coreboot | David Hendricks | 2018-07-03 | 1 | -0/+1 |
| * | vendorcode/siemens: Add hwilib for Siemens specific info struct | Werner Zeh | 2016-04-28 | 1 | -0/+1 |
| * | Add Intel FSP northbridge support Sandybridge and Ivybridge | Marc Jones | 2013-12-04 | 1 | -0/+1 |
| * | Add Google ChromeOS vendor support | Stefan Reinauer | 2012-04-02 | 1 | -1/+1 |
| * | Change AMD vendorcode build | Kyösti Mälkki | 2011-12-02 | 1 | -5/+1 |
| * | Add the AMD Family10 Agesa code | efdesign98 | 2011-07-15 | 1 | -0/+1 |
| * | Addition of Family12/SB900 wrapper code | efdesign98 | 2011-06-28 | 1 | -1/+5 |
| * | Add AMD Agesa and AMD CIMx SB800 code. Patch 1 of 8. | Frank Vibrans | 2011-02-14 | 1 | -0/+1 |
| * | remove the code which is not ready to release. | Zheng Bao | 2011-01-18 | 1 | -1/+0 |
| * | Add AMD SB800 southbridge CIMx code. | Kerry She | 2011-01-01 | 1 | -0/+1 |
 |
index : coreboot.git | |
| Coreboot firmware sources | coreboot |
| summaryrefslogtreecommitdiffstats |