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* vendorcode/amd/agesa/fam14: Remove dropped platformArthur Heymans2022-11-07140-40538/+0
* vendorcode/amd/agesa/f14: Fix improper use of .dataArthur Heymans2022-05-286-21/+13
* amd/agesa/f14/Proc/Mem/Tech/DDR3/mtlrdimm3.h: Correct SPD_PERSONALITY_BYTEElyes Haouas2022-05-161-1/+1
* src: use ARRAY_SIZE where possiblePatrick Georgi2021-02-152-5/+5
* vc/amd/agesa/f.../Proc/Mem/Tech/DDR3: Support a custom memory profileMike Banon2020-12-022-1/+69
* vc/amd/agesa/f.../Proc/Mem/Tech/DDR3: Support XMP memory profilesMike Banon2020-12-021-7/+61
* vc/amd/agesa: Delete mfParallelTraining.cJoe Moore2020-03-043-293/+0
* vc/amd/agesa/f14/Proc/Mem: Fix uninitialized variableJoe Moore2020-03-041-0/+1
* vc/amd/agesa/[...]/Proc/Mem: Delete unused functionJoe Moore2020-03-042-61/+0
* src: Make implicit fall throughs explicitJacob Garber2019-07-192-8/+4
* vc/amd/agesa/f14: Add missing break statementJacob Garber2019-04-071-0/+1
* Fix typos involving "the the"Jonathan Neuschäfer2018-12-181-1/+1
* AGESA f14 vendorcode: Remove unused sourcesKyösti Mälkki2017-08-3110-2465/+0
* AGESA f14 vendorcode: Split to Makefile.inc filesKyösti Mälkki2017-08-3123-0/+75
* AGESA f14 vendorcode: Keep only Ontario refcodeKyösti Mälkki2017-08-30108-31297/+0
* AGESA: Correct PCI function number for MEM_GET(SET)REG outputsKonstantin Aladyshev2017-08-025-10/+10
* AGESA f14: Fix memory clock register decodingKyösti Mälkki2017-04-081-1/+2
* AGESA f14: Fix MemContext buffer parser for AmdInitPost()Kyösti Mälkki2017-04-061-3/+7
* AGESA: Drop unused assembly filesKyösti Mälkki2016-06-041-497/+0
* AGESA vendorcode: Suppress maybe-uninitialized warningsKyösti Mälkki2016-04-201-7/+7
* vendorcode/amd/agesa: Fix tautological compareEdward O'Callaghan2016-04-164-4/+4
* vendorcode/amd: 64bit fixesStefan Reinauer2015-10-301-5/+5
* vendorcode/amd/agesa: Use macros already defined in stdlib.hEdward O'Callaghan2014-07-181-14/+1
* vendorcode/amd/agesa/f14: Trivial - drop whitespaces in .hEdward O'Callaghan2014-07-1050-251/+251
* vendorcode/amd/agesa/f14: Trivial - drop trailing whitespacesEdward O'Callaghan2014-07-10185-948/+948
* amd/agesa/f14: Backport f15tn fixes from DDR3 in mtspd3.cEdward O'Callaghan2014-06-141-2/+2
* vendorcode/amd/agesa: unsigned enum is strictly positiveEdward O'Callaghan2014-05-211-6/+6
* amd/agesa: Implicit assigment between enum without castEdward O'Callaghan2014-05-191-1/+1
* S3 code in vendorcode folder.zbao2012-04-121-5/+5
* Update AMD F14 Agesa to support Rev C0 cpusefdesign982011-08-0644-48/+342
* Move existing AMD Ffamily14 code to f14 folderefdesign982011-06-22237-0/+74678
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