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path: root/src/vendorcode/amd/agesa/f15tn
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* src: Remove redundant use of ACPI offset(0)Elyes HAOUAS2020-12-031-2/+0
* vc/amd/agesa/f.../Proc/Mem/Tech/DDR3: Support a custom memory profileMike Banon2020-12-023-1/+74
* vc/amd/agesa/f.../Proc/Mem/Tech/DDR3: Support XMP memory profilesMike Banon2020-12-021-7/+61
* vendorcode/amd: Fix typo in *is defined* in commentsPaul Menzel2020-10-171-3/+3
* {include,mb,soc,sb,vendorcode}: Make hexadecimal notation consistentSubrata Banik2020-09-015-228/+228
* vc/amd/agesa/f15tn: add DDR1866_FREQUENCY to DdrMaxRateTab tableMike Banon2020-08-261-0/+1
* nb/amd/agesa: define DDR3_SPD_SIZE as a common valueMike Banon2020-08-241-1/+2
* vc/amd/agesa/f15tn: add 933 MHz to GfxMemClockFrequencyDefinitionTableMike Banon2020-08-171-1/+1
* vc/amd/agesa/f15tn: Drop dead codeAngel Pons2020-07-094-156/+0
* AGESA f14/f15tn/f16kb: Clean up buildOpts.c filesAngel Pons2020-06-013-44/+90
* AGESA f14/f15tn/f16kb: Deduplicate RAM settingsAngel Pons2020-05-261-28/+28
* AGESA f15tn: Factor out default MTRR settingsAngel Pons2020-05-261-1/+17
* AGESA f14/f15tn/f16kb: Factor out memory settingsAngel Pons2020-05-261-8/+8
* AGESA f14/f15tn/f16kb: Factor out PCI MMIO base/sizeAngel Pons2020-05-261-10/+9
* AGESA f14/f15tn/f16kb: Factor out AGESA_VERSION_STRINGAngel Pons2020-05-261-0/+6
* AGESA f14/f15tn/f16kb: Factor out AGESA_PACKAGE_STRINGAngel Pons2020-05-261-0/+6
* vc/amd/agesa/f15tn,f16kb: Fix array typesJacob Garber2020-04-181-1/+1
* src (minus soc and mainboard): Remove copyright noticesPatrick Georgi2020-03-171-3/+0
* vc/amd/agesa/[...]/Config: Avoid out-of-bounds warningsJoe Moore2020-03-041-1/+2
* vc/amd/agesa: Delete mfParallelTraining.cJoe Moore2020-03-043-295/+0
* vc/amd/agesa/[...]/Proc/Mem: Delete unused functionJoe Moore2020-03-042-54/+0
* vc/amd/agesa: Fix out of bounds readJoe Moore2020-01-131-1/+1
* vc/amd/agesa: Remove unused assignmentsJoe Moore2020-01-101-2/+0
* vendorcode/amd/agesa: Correct typoWim Vervoorn2019-11-141-1/+1
* AGESA: Define extra CFLAGS just onceKyösti Mälkki2019-08-201-3/+0
* src: Make implicit fall throughs explicitJacob Garber2019-07-194-29/+22
* vendorcode/amd/agesa/f15tn: Fix condition that has identical branchesElyes HAOUAS2019-07-121-1/+1
* vendorcode/agesa/*/Proc/IDS/Library/IdsLib.c: Fix logical 'or' testsElyes HAOUAS2019-06-151-1/+1
* vendorcode/agesa: Fix check for valid PhyLaneElyes HAOUAS2019-06-151-1/+1
* AGESA: Move heap_status_name() implementationKyösti Mälkki2019-05-251-2/+0
* AGESA binaryPI: Sync STRUCT_NAME definitionsKyösti Mälkki2019-05-231-1/+4
* src/vendorcode/amd/agesa/f15tn: Update microcode to version 0x600111F 2018-03-05Mike Banon2019-05-204-2676/+408
* Fix code that would trip -Wtype-limitsJulius Werner2019-05-062-1/+4
* Make common macros double-evaluation safeJulius Werner2019-04-041-12/+12
* AGESA vendorcode: Define libagesa rule just onceKyösti Mälkki2019-02-251-7/+0
* Fix typos involving "the the"Jonathan Neuschäfer2018-12-181-1/+1
* src: Typo fix (cosmetic)Peter Lemenkov2018-10-232-2/+2
* vendorcode/amd/agesa/f15tn: add Richland RL-A1 to the equivalence tableMike Banon2018-08-201-0/+2
* AGESA: Run ar with DTKyösti Mälkki2018-05-061-1/+1
* vendorcode/amd/agesa: Fix variable length array declarationKyösti Mälkki2018-05-031-5/+7
* vendorcode/amd/agesa: Fix variable length array declarationPaul Menzel2018-05-031-1/+1
* src/vendorcode/amd: Use AR variable in MakefilesMartin Roth2017-10-191-1/+1
* AGESA: Drop CAR teardown without POSTCAR_STAGEKyösti Mälkki2017-09-261-30/+3
* AGESA: Implement POSTCAR_STAGEKyösti Mälkki2017-09-261-0/+4
* AGESA: Fix OptionsIds.h includeKyösti Mälkki2017-09-262-87/+1
* AGESA: Allow const PcieComplexList for OemCustomizeKyösti Mälkki2017-09-262-2/+9
* AGESA buildsystem: Reduce include path exposureKyösti Mälkki2017-09-131-8/+16
* AGESA vendorcode: Remove AGESA_ENTRY_INIT_RECOVERYKyösti Mälkki2017-09-135-488/+0
* AGESA vendorcode: Move PlatformInstall.hKyösti Mälkki2017-09-1335-0/+2
* agesa/f15tn: Remove unnecessary logic opDamien Zammit2017-09-131-1/+1
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