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path: root/src/vendorcode/mediatek/mt8195/dramc
Commit message (Expand)AuthorAgeFilesLines
* vendorcode/mediatek/mt8195: Fix set but unused variablesArthur Heymans2023-05-136-42/+17
* mb/google: Replace some strings in regulator.cRex-BC Chen2022-07-211-10/+10
* vc/mediatek/mt8195: Fix rank1 CKE setting for single-rank DRAMRyan Chuang2021-12-011-0/+5
* vc/mediatek/mt8195: Remove unused code and commentsRyan Chuang2021-11-0119-15070/+4812
* vc/mediatek/mt8195: fix misleading-indentation errorRex-BC Chen2021-10-081-2/+2
* vc/mediatek/mt8195: Remove unused codeRyan Chuang2021-09-2911-13532/+6
* vc/mediatek/mt8195: Remove unused codeRyan Chuang2021-09-032-2029/+1
* vc/mediatek/mt8195: Optimize DRAM init time by disabling Vcore settingRyan Chuang2021-08-121-3/+4
* vc/mediatek/mt8195: Optimize DRAM init time by reducing I2C I/ORyan Chuang2021-08-091-0/+2
* vc/mediatek/mt8195: Optimize DRAM init time by limiting frequency countRyan Chuang2021-08-091-0/+3
* vc/mediatek/mt8195: Improve DRAM stability by impedance trackingRyan Chuang2021-07-281-1/+5
* vc/mediatek/mt8195: Remove redundant codeRyan Chuang2021-07-131-10/+1
* vc/mediatek/mt8195: Enable DRAM Vcore DVFS settingsRyan Chuang2021-07-122-2/+6
* vc/mediatek/mt8195: add FOR_COREBOOT defineRex-BC Chen2021-07-121-10/+12
* vc/mediatek/mt8195: Enable VREF calibration at DDR3200 for S0 stabilityRyan Chuang2021-07-071-1/+1
* vc/mediatek/mt8195: Improve settings of duty calibrationRyan Chuang2021-07-071-9/+17
* vc/mediatek/mt8195: Fix license headersRex-BC Chen2021-06-3019-717/+28
* vc/mediatek/mt8195: Allow adjusting DRAM voltage in DRAM calibrationRyan Chuang2021-06-241-17/+26
* vc/mediatek/mt8195: Fix code indentationPatrick Georgi2021-06-151-2/+2
* vendor/mediatek: Add MT8195 dram initialization codeRyan Chuang2021-05-1420-0/+79998
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