summaryrefslogtreecommitdiffstats
path: root/src/vendorcode
Commit message (Expand)AuthorAgeFilesLines
* intel/fsp: Update cannonlake fsp headerLijian Zhao2018-02-144-19/+207
* vc/amd/00670F00: Introduce S3FinalRestore helperMarshall Dawson2018-02-121-0/+14
* vendorcode/amd/pi/00670f00: Update headers to AGESA 1.3.0.9Marc Jones2018-02-019-77/+89
* vendorcode/intel/fsp/fsp2_0: Add CannonLake FirmwareVersionInfoHob headerSubrata Banik2018-01-311-0/+67
* intel/fsp: Update cannonlake fsp headerLijian Zhao2018-01-313-194/+388
* vendorcode/intel/fsp: Remove TODOs and make use of EDK2 headerSubrata Banik2018-01-311-25/+21
* vendorcode/intel: Add Kconfig option to get UDK_VERSIONSubrata Banik2018-01-311-0/+20
* vendorcode/intel: Add UDK2017 supportSubrata Banik2018-01-31524-0/+172270
* AGESA f15 cimx/sb700: Remove vendorcode sourceKyösti Mälkki2018-01-24613-200311/+0
* AGESA f15 cimx/sb700: Remove unused chips codeKyösti Mälkki2018-01-242-2/+0
* binaryPI vendorcode: Remove HeapXXBuffer functionsKyösti Mälkki2018-01-233-179/+0
* AGESA_LEGACY: Apply final cleanup and file removalsKyösti Mälkki2018-01-231-7/+0
* security/tpm: Change TPM naming for different layers.Philipp Deppenwiese2018-01-182-2/+2
* security/tpm: Move tpm TSS and TSPI layer to security sectionPhilipp Deppenwiese2018-01-182-3/+2
* AGESA f15: Drop CAR teardown without POSTCAR_STAGEKyösti Mälkki2018-01-171-45/+4
* vendorcode/intel/fsp/fsp2_0/glk: Update header files as per v77_12Srinidhi N Kaushik2018-01-051-3/+15
* soc/amd/common: load post-memory AGESA as rmoduleAaron Durbin2018-01-051-5/+13
* soc/amd/common: Allow AGESA file split for pre- and post-memoryJustin TerAvest2018-01-052-1/+54
* vendor/intel/skykabylake: Update FSP header files to version 2.9.2Balaji Manigandan B2017-12-222-4/+11
* vc/amd/pi/0067F00: add option to add AGESA binary PI as stageAaron Durbin2017-12-132-0/+18
* vc/amd/pi/00670F00: fix #include paths to only use <amdblocks/header.h>Aaron Durbin2017-12-122-2/+2
* soc/amd/common: Move Agesa related headersRichard Spiegel2017-12-121-1/+1
* vc/amd/pi/00670F00/binaryPI: cache the AGESA dispatcherAaron Durbin2017-12-111-76/+38
* soc/intel/skylake: add acoustic noise mitigation params for FSP 1.1Matt DeVillier2017-12-091-3/+23
* vendorcode/intel/fsp/fsp2_0/glk: Update header files as per v69_51Ravi Sarawadi2017-12-082-73/+107
* cr50: Make EC clear AP_OFF before hibnernateDaisuke Nojiri2017-12-081-3/+4
* security/vboot: Guard google_chromeec_reboot by if clauseDaisuke Nojiri2017-12-041-1/+2
* vendorcode/amd/pi/00670F00: Halt build if headers aren't wrappedMartin Roth2017-11-2226-0/+78
* vendorcode/amd/pi/00670F00: Remove direct AGESA header includesMartin Roth2017-11-221-2/+1
* vendorcode/amd/pi/00670F00: Clean up makefileMartin Roth2017-11-211-33/+23
* vendorcode/amd/pi/00670F00: Remove dependency on amd/include dirMartin Roth2017-11-194-2/+933
* vendorcode/amd/pi/00670F00: Remove cpuFamilyTranslation.cMartin Roth2017-11-191-442/+0
* vendorcode/amd/pi/00670F00: Get rid of filecodes, replace filecode.hMartin Roth2017-11-163-772/+4
* vendorcode/amd/pi: Create stoney version of amdlibMartin Roth2017-11-165-3/+2320
* vendorcode/amd/pi: Split stoney PI into its own MakefileMartin Roth2017-11-162-17/+147
* AMD Stoney Ridge: Add agesa_headers.hMartin Roth2017-11-141-0/+33
* intel/fsp: Update cannonlake FSP headerLijian Zhao2017-11-113-15/+38
* vendorcode/amd/pi/00670f00: Set ModuleIdentifier to be 8 bytesMartin Roth2017-11-111-1/+1
* src: Fix all Siemens copyrightsMario Scheithauer2017-11-071-1/+1
* vendorcode/amd/pi/00670F00: remove unused headersMartin Roth2017-11-037-1936/+0
* security/vboot: Move vboot2 to security kconfig sectionPhilipp Deppenwiese2017-10-225-7/+7
* cr50_enable_update: Add printk before EC hibernateShelley Chen2017-10-201-0/+1
* vendorcode/amd/pi/00670F00: Remove S3 restore functionsMartin Roth2017-10-201-33/+0
* intel/fsp: Update cannonlake FSP headerLijian Zhao2017-10-192-1627/+23
* src/vendorcode/amd: Use AR variable in MakefilesMartin Roth2017-10-196-6/+6
* vendor/intel/skykabylake: Update FSP header files to version 2.7.2Balaji Manigandan B2017-10-053-45/+123
* AGESA vendorcode: Add ENABLE_MRC_CACHE optionKyösti Mälkki2017-10-051-1/+3
* intel/fsp: Update cannonlake FSP headerLijian Zhao2017-10-043-195/+220
* vc/amd/pi/00670F00: Remove HeapXXBuffer functionsMartin Roth2017-10-031-60/+0
* vendorcode/amd/pi: Put libagesa build all in libagesa directoryMartin Roth2017-10-031-5/+6