summaryrefslogtreecommitdiffstats
path: root/src/vendorcode
Commit message (Expand)AuthorAgeFilesLines
* {soc,vc,mb}/intel: Drop support for Cannon Lake SoCFelix Singer2021-01-116-6718/+0
* vc/intel/FSP2_0/CPX-SP: update to FSP ww01 releaseJonathan Zhang2021-01-1110-214/+10
* vendorcode/intel/fsp: Update Tiger Lake v3444 FSP HeadersSrinidhi N Kaushik2021-01-111-8/+20
* vc/intel/fsp1_1/skylake: Remove unused header fileFelix Singer2021-01-091-1075/+0
* vc/google/chromeos: Move chromeos_set_me_hash() prototypeKyösti Mälkki2021-01-032-1/+1
* sb/amd/pi/hudson: Enable use of common GPIO APIKyösti Mälkki2020-12-281-1/+1
* vc/intel/fsp/fsp2_0/alderlake: Update FSP header file version to 1514_11Subrata Banik2020-12-231-50/+64
* soc/amd/picasso: Add UPDs for support eDP phy tunning adjustChris Wang2020-12-211-1/+11
* vc/intel/fsp/fsp2_0/alderlake: Update FSP header file version to 1512_11Subrata Banik2020-12-181-29/+29
* vc/intel/fsp/fsp2_0/cooperlake_sp: Update WW47 FSP Memory map HOBJohnny Lin2020-12-071-1/+1
* amd_blobs: Always set default pathsNico Huber2020-12-051-5/+5
* src: Remove redundant use of ACPI offset(0)Elyes HAOUAS2020-12-032-4/+0
* cbfs: Simplify load/map API names, remove type argumentsJulius Werner2020-12-024-7/+6
* vc/amd/agesa/f.../Proc/Mem/Tech/DDR3: Support a custom memory profileMike Banon2020-12-0210-3/+337
* vc/amd/agesa/f.../Proc/Mem/Tech/DDR3: Support XMP memory profilesMike Banon2020-12-025-24/+227
* vendorcode/intel/fsp: Add Elkhart Lake FSP headers for FSP v2341Tan, Lean Sheng2020-12-026-0/+8433
* vendorcode/intel/fsp: Add Jasper Lake FSP headers for FSP v2385_04Ronak Kanabar2020-12-021-4/+39
* vc/intel/fsp/fsp2_0/alderlake: Update FSP header file version to 1483_11Subrata Banik2020-11-262-89/+88
* vendorcode/eltan/security: Add dependency for menu itemsFrans Hendriks2020-11-222-0/+6
* cpu/amd/pi: Remove unused cpu code 00660F01Martin Roth2020-11-222-13/+2
* vc/amd/pi/00670F00: Add raw AGESA binary only to COREBOOT CBFSFurquan Shaikh2020-11-221-0/+1
* vc/intel/fsp/fsp2_0/alderlake: Update FSP header file version to 1474_11Subrata Banik2020-11-212-59/+55
* vc/intel/fsp2/denverton_ns: Remove unused filesFelix Singer2020-11-204-1156/+0
* vc/google/chromeos/sar: Make "SAR not found" log a debug messageMaulik V Vaghela2020-11-201-1/+1
* vc/intel/fsp/fsp2_0/cpx_sp: Expose RasModesEnabled field inTim Chu2020-11-201-5/+17
* vendorcode/intel/fsp: Add Jasper Lake FSP headers for FSP v2385_02Ronak Kanabar2020-11-191-38/+55
* ACPI S3: Replace acpi_is_wakeup()Kyösti Mälkki2020-11-191-1/+1
* vc/intel/fsp/fsp2_0/cooperlake_sp: Fix WW45 FSP Memory map HOB mismatchJohnny Lin2020-11-161-1/+1
* vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v3444Srinidhi N Kaushik2020-11-152-6/+6
* vc/intel/fsp/fsp2_0/alderlake: Update FSP header file version to 1454Subrata Banik2020-11-132-36/+46
* vc/intel/FSP2_0/CPX-SP: update to ww45 release and add watermark optionJonathan Zhang2020-11-071-158/+171
* soc/amd/picasso: Update coreboot UPD variable names to include unitsZheng Bao2020-11-061-21/+21
* vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v3425Srinidhi N Kaushik2020-11-021-3/+3
* vc/amd/fsp: Update bl_errorcodes_public.hMartin Roth2020-10-302-6/+50
* vc/intel/fsp/fsp2_0/adl: Update FSP header file version to 1432Subrata Banik2020-10-252-272/+291
* vc/amd/fsp/picasso: Remove typedefs in bl_syscall_public.hJason Glenesk2020-10-231-54/+43
* volteer+vendorcode: Retrieve Cr50 version only via SPIJes Klinke2020-10-191-15/+18
* vendorcode/intel/fsp: Add Jasper Lake FSP headers for FSP v2376Ronak Kanabar2020-10-192-1/+83
* vendorcode/amd: Fix typo in *is defined* in commentsPaul Menzel2020-10-178-62/+62
* vc/amd/Kconfig: Add missing dot in AMD domain www.amd.comPaul Menzel2020-10-171-1/+1
* vc/intel/fsp/fsp2_0/adl: Update FSP header to version 1332.01Subrata Banik2020-10-141-22/+32
* vendorcode/google/dram_part_num: Lower the severity of debug statementKarthikeyan Ramasubramanian2020-10-131-2/+2
* vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v3373Srinidhi N Kaushik2020-10-122-39/+55
* vc/intel/fsp/fsp2_0/cpx_sp: Expose DIMM Present and DdrVoltage fieldsJohnny Lin2020-10-081-6/+9
* vc/intel/fsp/fsp2_0/CPX-SP: update to Intel ww40 releaseJonathan Zhang2020-10-083-7/+21
* vc/amd/fsp: Update the svc call header for the Mod Exp SVCMartin Roth2020-10-071-0/+21
* vendorcode/google: add CHROMEOS_DRAM_PART_NUMBER_IN_CBI Kconfig optionNick Vaccaro2020-10-053-0/+40
* vc/amd/fsp/picasso: Add bit definitions for PSP info in transfer blockMartin Roth2020-10-011-0/+5
* vc/intel/fsp/fsp2_0/CPX-SP: upgrade to ww38 FSP releaseJonathan Zhang2020-09-282-104/+114
* vc/amd/fsp/picasso: Update to UPD 1.0.1.3Raul E Rangel2020-09-251-5/+9
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-09 09:08:22 +0000