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path:
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src
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vendorcode
Commit message (
Expand
)
Author
Age
Files
Lines
*
ChromeOS: add missing string.h in gnvs.c
Stefan Reinauer
2012-04-27
1
-0
/
+1
*
S3 code in vendorcode folder.
zbao
2012-04-12
6
-234
/
+324
*
Don't unconditionally show ChromeOS options
Stefan Reinauer
2012-04-04
1
-0
/
+5
*
S3 code whitespaces changes.
zbao
2012-04-02
2
-61
/
+54
*
Add Google ChromeOS vendor support
Stefan Reinauer
2012-04-02
11
-16
/
+503
*
Add TPM support to coreboot
Stefan Reinauer
2012-03-30
1
-0
/
+201
*
Add Google ChromeOS vendorcode directory
Stefan Reinauer
2012-03-30
3
-0
/
+49
*
AGESA family 12 changes to fix torpedo warnings
Martin Roth
2012-03-14
2
-1
/
+40
*
SB700 southbridge: AMD SB700/SP5100 southbridge CIMX code
Kerry Sheh
2012-02-02
25
-0
/
+5834
*
RD890 Northbridge: AMD RD890/SR56X0 Northbridge CIMX code
Kerry Sheh
2012-02-02
66
-0
/
+20136
*
AGESA F15: AMD family15 AGESA code
Kerry Sheh
2012-01-26
733
-0
/
+257251
*
Change AMD vendorcode build
Kyösti Mälkki
2011-12-02
5
-6
/
+9
*
Fix AMD SB800 (cimx) southbridge code to compile with gcc 4.6
Stefan Reinauer
2011-10-14
1
-0
/
+4
*
sb800: sata combine mode configure fix
Kerry Sheh
2011-10-11
2
-2
/
+12
*
AMD Agesa macro expansion fix
efdesign98
2011-09-15
3
-7
/
+5
*
AMD Agesa changes to fix F14 boot issues
efdesign98
2011-09-15
6
-14
/
+30
*
AMD SB800 southbridge update
Kerry She
2011-09-07
3
-1
/
+23
*
AMD F14 southbridge update
Kerry She
2011-09-07
3
-3
/
+8
*
AMD Family 14 Agesa warning fix
efdesign98
2011-08-09
1
-1
/
+1
*
Update AMD F14 Agesa to support Rev C0 cpus
efdesign98
2011-08-06
276
-5319
/
+15398
*
Update AMD SR5650 and SB700
efdesign98
2011-07-22
1
-12
/
+12
*
Add the AMD Family10 Agesa code
efdesign98
2011-07-15
573
-0
/
+180355
*
Addition of Family12/SB900 wrapper code
efdesign98
2011-06-28
2
-18
/
+32
*
Move existing AMD Ffamily14 code to f14 folder
efdesign98
2011-06-22
884
-2
/
+2
*
Rename {CPU|NB|SB}/amd/*_wrapper folders
efdesign98
2011-06-22
2
-22
/
+22
*
Add AMD SB900 CIMx code
efdesign98
2011-06-21
38
-0
/
+15237
*
Add AMD Family 12 cpu Agesa code
efdesign98
2011-06-21
1045
-0
/
+320885
*
trivial remove blanks at the end of line
Kerry She
2011-06-01
1
-2
/
+2
*
This patch fix a AMD sb800 wrapper compile warning:
Kerry She
2011-06-01
3
-8
/
+8
*
Remove multiple mmconf settings and just use kconfig setting.
Marc Jones
2011-05-15
1
-1
/
+1
*
Move mmconf base from e0000000 to f8000000 to avoid conflict with UMA BAR.
Scott Duplichan
2011-05-15
1
-1
/
+1
*
Fix ACPI shutdown function by removing reliance on SMI.
Scott Duplichan
2011-05-15
1
-1
/
+1
*
SB800 CIMX code can share the AGESA V5 lib code,
Kerry She
2011-05-07
2
-1
/
+12
*
1. move _mm_clflush_fs() to __SSE3__ block, because __builtin_ia32_sfence() i...
Kerry She
2011-05-07
2
-18
/
+22
*
put the amdlib and agesa constant to .rodata segment.
Kerry She
2011-05-07
1
-3
/
+1
*
Adds VOID to empty parameter lists to get rid of some build warnings.
Frank Vibrans
2011-05-05
10
-25
/
+29
*
Remove AMD Agesa requirement for standard include files
Frank Vibrans
2011-05-05
1
-3
/
+16
*
Fix breaking the build after removing files in tthe previous checkin.
Marc Jones
2011-03-17
2
-24
/
+0
*
Perform cleanup and file shrinkage of the AMD AGESA code.
Frank.Vibrans
2011-03-17
10
-4426
/
+25
*
Add AMD Agesa and AMD CIMx SB800 code. Patch 1 of 8.
Frank Vibrans
2011-02-14
922
-0
/
+287978
*
remove the code which is not ready to release.
Zheng Bao
2011-01-18
38
-10734
/
+0
*
change a readable way to fix SB800 CIMX "multi-character constant warning".
Kerry She
2011-01-11
3
-9
/
+4
*
Trivial:
Kerry She
2011-01-04
5
-102
/
+113
*
Add AMD SB800 southbridge CIMx code.
Kerry She
2011-01-01
38
-0
/
+10728