summaryrefslogtreecommitdiffstats
path: root/src
Commit message (Expand)AuthorAgeFilesLines
* src/mainboard: Fix various typosJonathan Neuschäfer2017-11-2332-33/+33
* soc/intel/cannonlake: Invoke pmc and hard reset only if CSE fails to resetJohn Zhao2017-11-231-1/+3
* Constify struct cpu_device_id instancesJonathan Neuschäfer2017-11-2354-54/+54
* sb/intel/i82801jx: Store initial timestamp in bootblockArthur Heymans2017-11-231-0/+14
* sb/intel/i82801ix: fetch initial timestamp in bootblockArthur Heymans2017-11-235-3/+28
* google/fizz: Define smbios_mainboard_sku to return OEM IDsShelley Chen2017-11-232-3/+36
* soc/amd/common: Include appropriate headers in dimm_spd.hMarc Jones2017-11-231-0/+4
* soc/amd/stoneyridge: Get entire DDR4 SPDMarc Jones2017-11-232-1/+6
* chromeec: Change the API for hostevent/wake masks to handle 64-bitFurquan Shaikh2017-11-2210-55/+55
* google/gru: Add support for rainierEge Mihmanli2017-11-223-2/+12
* vendorcode/amd/pi/00670F00: Halt build if headers aren't wrappedMartin Roth2017-11-2226-0/+78
* vendorcode/amd/pi/00670F00: Remove direct AGESA header includesMartin Roth2017-11-221-2/+1
* Create SOC description file soc.aslRichard Spiegel2017-11-225-28/+34
* drivers/i2c/tpm/cr50: Simplify and increase init delay to 30 secondsDuncan Laurie2017-11-221-75/+73
* spi/tpm: claim locality just once during bootVadim Bendebury2017-11-211-27/+42
* src/soc/intel/apollolake: move TCO1 disable into bootblockVadim Bendebury2017-11-212-11/+7
* arch/x86: Write ACPI DBG2 table only if the device has been enabledMario Scheithauer2017-11-211-1/+5
* vendorcode/amd/pi/00670F00: Clean up makefileMartin Roth2017-11-211-33/+23
* soc/amd/stoneyridge: Add ELOG to SMMJohn E. Kabat Jr2017-11-211-0/+68
* amd/stoneyridge/spi: Fix reads greater than 5 bytesMarshall Dawson2017-11-211-4/+4
* soc/amd/common: Remove duplicated #include amd_pci_int_defs.hRichard Spiegel2017-11-211-1/+0
* mb/google: Update/add ChromeOS device marketing namesMatt DeVillier2017-11-217-18/+18
* mainboard/google/fizz: Enable separate MRC cache for recovery modeShelley Chen2017-11-202-13/+20
* google/gru: Add config for scarlet-derived boardsEge Mihmanli2017-11-205-20/+27
* soc/intel/cannonlake: Add ACPI workaround for EMMCLijian Zhao2017-11-201-0/+20
* amd/stoneyridge: Fix SPD files and functions camel caseMarc Jones2017-11-208-24/+23
* include/timer.h: add NSECS_PER_SEC macroLin Huang2017-11-191-0/+1
* vendorcode/amd/pi/00670F00: Remove dependency on amd/include dirMartin Roth2017-11-194-2/+933
* mb/google/kahlee: Move ec.h into variant include directoriesMartin Roth2017-11-198-5/+7
* vendorcode/amd/pi/00670F00: Remove cpuFamilyTranslation.cMartin Roth2017-11-191-442/+0
* mainboard/google/kahlee: Remove direct AGESA header includesMartin Roth2017-11-191-2/+0
* mainboard/google/kahlee: Update memory.cMartin Roth2017-11-194-34/+3
* mb/google: Add Chromebook marketing namesJonathan Neuschäfer2017-11-1725-67/+67
* Move amd/stoneyridge/include/amd_pci_int_defs.h to include/soc/Richard Spiegel2017-11-173-2/+2
* amd/gardenia: Add defines in OemCustomize.cMarshall Dawson2017-11-171-4/+8
* soc/intel/cannonlake: fix gpio pin numbersBora Guvendik2017-11-171-165/+169
* soc/intel/cannonlake: Add cpu.asl fileShaunak Saha2017-11-171-0/+43
* amd/stoneyridge: Enable SMI trap on SlpTypMarshall Dawson2017-11-171-0/+18
* amd/stoneyridge: Add SlpTyp SMI handlerMarshall Dawson2017-11-171-0/+68
* amd/stoneyridge: Add SPI controller driverMarshall Dawson2017-11-173-1/+234
* mb/lenovo/t400/blc.c: Add LTN154P2-L05 to whitelistKevin Keijzer2017-11-171-0/+1
* mb/lenovo/t400: Add LTN154X3-L02 to list of known displaysKevin Keijzer2017-11-171-0/+1
* vendorcode/amd/pi/00670F00: Get rid of filecodes, replace filecode.hMartin Roth2017-11-164-774/+4
* vendorcode/amd/pi: Create stoney version of amdlibMartin Roth2017-11-165-3/+2320
* vendorcode/amd/pi: Split stoney PI into its own MakefileMartin Roth2017-11-162-17/+147
* drivers/spi/tpm: Poll TPM_VALID bit until validShelley Chen2017-11-161-0/+10
* variants/kahlee: Add thermal ASLMarc Jones2017-11-155-0/+187
* google/kahlee: Get power plug notification from the ECMarc Jones2017-11-151-0/+4
* mb/{amd/gardenia,google/kahlee}: move carrizo_fch.asl code to socRichard Spiegel2017-11-154-121/+2
* soc/intel/skylake: Make use of common CSE code for skylakeSubrata Banik2017-11-154-395/+19
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-17 18:25:33 +0000