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* soc/amd/stoneyridge/include/pci_devs: remove unused DEVID definesFelix Held2021-11-151-34/+21
* mb/google/brya/variants/primus: enable RTD3 for PCIe-eMMC bridgeMalik_Hsu2021-11-154-2/+28
* drivers/wifi/generic: fix package_size to align with WLAN driverMatt Chen2021-11-151-1/+1
* mb/google/brya/variants/gimble: Update PL1 min valueSumeet Pawnikar2021-11-151-1/+1
* vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2422_01Ronak Kanabar2021-11-151-26/+28
* mb/google/brya/var/kano: Add thermal sensor settingsDavid Wu2021-11-151-2/+5
* mb/google/brya: Create vell variantShon Wang2021-11-158-0/+45
* soc/intel/tigerlake: Add config option for S3 ACPISean Rhodes2021-11-155-123/+186
* soc/intel/tigerlake/apci: Only use SCM for ChromeOSSean Rhodes2021-11-151-0/+7
* mb/google/corsola: Add VMCH and VMC for regulator interfaceRex-BC Chen2021-11-152-0/+4
* soc/mediatek/mt8186: Add support for regulator VMCH and VMCRex-BC Chen2021-11-152-0/+124
* soc/mediatek/mt8186: Add AUXADC driver supportGuodong Liu2021-11-153-0/+49
* soc/mediatek/mt8186: add GIC pre-initialization functionRex-BC Chen2021-11-154-0/+36
* soc/mediatek/mt8186: add USB supportRex-BC Chen2021-11-155-2/+58
* mb/google/corsola: Implement regulator interfaceRex-BC Chen2021-11-153-1/+48
* mb/google/corsola: add configuration for kingler and krabbyRex-BC Chen2021-11-152-0/+10
* soc/mediatek/mt8186: add SPM register definitionsRex-BC Chen2021-11-151-0/+533
* soc/mediatek/mt8186: Enable mmu operation for L2C SRAM and DMARex-BC Chen2021-11-154-11/+15
* soc/mediatek: move functions of mmu operation to common folderRex-BC Chen2021-11-158-66/+28
* soc/mediatek/mt8186: Add support for PMIC MT6366James Lo2021-11-159-4/+1555
* soc/mediatek: change help text of FLASH_DUAL_READRex-BC Chen2021-11-153-3/+3
* Add ENV_STAGE_SUPPORTS_SMP to clean up spinlock stubsKyösti Mälkki2021-11-135-45/+12
* mb/google/guybrush: Add variant_espi_gpio_tableRob Barnes2021-11-136-43/+65
* sod/amd/cezanne: Use LZ4 for FSP-M when using SPI DMARaul E Rangel2021-11-131-1/+2
* Kconfig: Show console DEBUG_FUNC if OVERRIDE_LOGLEVEL is setMarc Jones2021-11-131-1/+1
* soc/amd/psp_verstage: Reboot on verstage_soc_early_init failRob Barnes2021-11-132-2/+9
* Revert "mb/google/brask: Correct GPIO GPP_R6 and GPP_R7 setting"David Wu2021-11-131-2/+2
* soc/intel/xeon_sp: Fix size_t type mismatch in print statementPaul Menzel2021-11-131-1/+1
* google/stout: Remove duplicate recovery mode switch entryKyösti Mälkki2021-11-121-1/+0
* google/butterfly: Refactor get_recovery_mode_switch()Kyösti Mälkki2021-11-121-17/+4
* mb/google/trogdor: Modify BOE panel_id for mrblandZanxi Chen2021-11-121-3/+5
* soc/intel/common/block/pcie: Add ADL-P CPU PCIe Device IDsTracy Wu2021-11-122-0/+7
* soc/mediatek/mt8195: Add APU device apc driverFlora Fu2021-11-125-0/+330
* soc/amd/cezanne: Use LZ4 for FSP-SRaul E Rangel2021-11-121-1/+1
* soc/amd/cezanne: Preload FSP-SRaul E Rangel2021-11-122-0/+12
* soc/amd/common/block/lpc: Set FSP-S/M alignment to 64 when using SPI DMARaul E Rangel2021-11-121-1/+9
* mb/google/brya/var/primus: Disable autonomous GPIO power managementCasper Chang2021-11-121-1/+10
* google/deltaur,drallion,sarien: Refactor ChromeOS GPIOsKyösti Mälkki2021-11-123-66/+21
* mb/google,intel: Add ChromeOS GPIOs to onboard.hKyösti Mälkki2021-11-1218-38/+92
* drivers/amd/agesa/romstage.c: Remove lapic_id checkArthur Heymans2021-11-121-8/+4
* mb/google/brya/var/felwinter: Enable SaGvEric Lai2021-11-111-1/+1
* mb/system76/gaze16: Add System76 Gazelle 16Jeremy Soller2021-11-1126-0/+1277
* mb/google/brya/var/kano: Configure USB2 and USB3 portDavid Wu2021-11-111-0/+6
* lynxpoint/broadwell: Use `azalia_codecs_init()`Angel Pons2021-11-114-30/+8
* device/azalia_device: Drop unused function parameterAngel Pons2021-11-117-8/+8
* haswell/lynxpoint/broadwell: Use `azalia_codec_init()`Angel Pons2021-11-116-103/+8
* device/azalia_device: Adapt and export `codec_init()`Angel Pons2021-11-112-3/+4
* lynxpoint/broadwell: Use `azalia_program_verb_table()`Angel Pons2021-11-114-21/+3
* azalia_device: Report if codec verb loading failedAngel Pons2021-11-111-2/+5
* sb/intel/bd82x6x: Use `azalia_codecs_init()`Angel Pons2021-11-112-96/+4
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-04 21:23:34 +0000