| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | util: Update all shebangs to use /usr/bin/env | Martin Roth | 2021-01-25 | 1 | -1/+1 |
| * | treewide: Remove "this file is part of" lines | Patrick Georgi | 2020-05-11 | 1 | -1/+0 |
| * | util/: Replace GPLv2 boiler plate with SPDX header | Patrick Georgi | 2020-05-09 | 1 | -8/+1 |
| * | AUTHORS, util/: Drop individual copyright notices | Patrick Georgi | 2020-05-09 | 1 | -2/+0 |
| * | riscv: fix bug of sifive-gpt.py | Xiang Wang | 2018-11-22 | 1 | -1/+1 |
| * | treewide: use /usr/bin/env where appropriate | Yegor Timoshenko | 2018-11-17 | 1 | -1/+1 |
| * | riscv: add trampoline in MBR block to support boot mode 1 | Philipp Hug | 2018-09-14 | 1 | -1/+13 |
| * | util: Add description.md to each util | Tom Hiller | 2018-07-26 | 1 | -0/+6 |
| * | src/sifive: Add the SiFive Freedom Unleashed 540 SoC | Jonathan Neuschäfer | 2018-04-26 | 1 | -0/+181 |
| * | util/riscvtools: Rename to util/riscv/ | Jonathan Neuschäfer | 2018-04-25 | 2 | -0/+45 |
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index : coreboot.git | |
| Coreboot firmware sources | coreboot |
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