blob: 894bf4030f3a767786efef21817def80bf2608d8 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
|
/* SPDX-License-Identifier: GPL-2.0-only */
#include <gcccar.inc>
#include <cpu/x86/cache.h>
.code32
.globl chipset_teardown_car
chipset_teardown_car:
pop %esp
/* Disable cache */
movl %cr0, %eax
orl $CR0_CacheDisable, %eax
movl %eax, %cr0
AMD_DISABLE_STACK
/* enable cache */
movl %cr0, %eax
andl $(~(CR0_CD | CR0_NW)), %eax
movl %eax, %cr0
jmp *%esp
|
