1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
|
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
Device (GFX0)
{
Name (_ADR, 0x00020000)
OperationRegion (GFXC, PCI_Config, 0x00, 0x0100)
Field (GFXC, DWordAcc, NoLock, Preserve)
{
Offset (0x10),
BAR0, 64,
Offset (0xe4),
ASLE, 32,
Offset (0xfc),
ASLS, 32,
}
OperationRegion (GFRG, SystemMemory, And (BAR0, 0xfffffffffffffff0), 0x400000)
Field (GFRG, DWordAcc, NoLock, Preserve)
{
Offset (CONFIG_INTEL_GMA_BCLV_OFFSET),
BCLV, CONFIG_INTEL_GMA_BCLV_WIDTH,
Offset (CONFIG_INTEL_GMA_BCLM_OFFSET),
BCLM, CONFIG_INTEL_GMA_BCLM_WIDTH
}
#include "configure_brightness_levels.asl"
#include "common.asl"
}
|
