blob: 099f7cbe3f3f9c80bbfdfd14c764c1a81aa00697 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
|
# SPDX-License-Identifier: GPL-2.0-only
if BOARD_AMD_MANDOLIN || BOARD_AMD_CEREME
config BOARD_SPECIFIC_OPTIONS
def_bool y
select SOC_AMD_COMMON_BLOCK_USE_ESPI
select SOC_AMD_PICASSO
select HAVE_ACPI_TABLES
select BOARD_ROMSIZE_KB_8192 if BOARD_AMD_MANDOLIN
select BOARD_ROMSIZE_KB_16384 if BOARD_AMD_CEREME
select AZALIA_PLUGIN_SUPPORT
select HAVE_ACPI_RESUME
select DRIVERS_UART_ACPI
select PICASSO_CONSOLE_UART if !AMD_LPC_DEBUG_CARD
config FMDFILE
string
default "src/mainboard/amd/mandolin/variants/\$(CONFIG_VARIANT_DIR)/board.fmd"
config AMD_LPC_DEBUG_CARD
bool "Enable LPC-Serial debug card on the debug header"
default n
select PICASSO_LPC_IOMUX
select SUPERIO_SMSC_SIO1036
help
AMD's debug card contains an SMSC SIO1036 device which provides
an I/O-based UART in the system. This feature is not compatible with
CONFIG_HUDSON_UART enabling the memory-mapped UART in the chipset.
Note that Kconfig does not currently enforce this restriction.
config CBFS_SIZE
hex
default 0x7cf000 if BOARD_AMD_MANDOLIN # Maximum size for the Mandolin FMAP
default 0xfcf000 if BOARD_AMD_CEREME # Maximum size for the Cereme FMAP
config MAINBOARD_DIR
string
default "amd/mandolin"
config VARIANT_DIR
string
default "mandolin" if BOARD_AMD_MANDOLIN
default "cereme" if BOARD_AMD_CEREME
config MAINBOARD_PART_NUMBER
string
default "MANDOLIN" if BOARD_AMD_MANDOLIN
default "CEREME" if BOARD_AMD_CEREME
config DEVICETREE
string
default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb"
config ONBOARD_VGA_IS_PRIMARY
bool
default y
config AMD_FWM_POSITION_INDEX
int
default 3 if BOARD_AMD_MANDOLIN
default 4 if BOARD_AMD_CEREME
help
TODO: might need to be adapted for better placement of files in cbfs
config MANDOLIN_HAVE_MCHP_FW
bool "Have Microchip EC firmware?"
default n
config MANDOLIN_MCHP_FW_FILE
string
depends on MANDOLIN_HAVE_MCHP_FW
default "3rdparty/blobs/mainboard/amd/mandolin/EC_mandolin.bin" if BOARD_AMD_MANDOLIN
default "3rdparty/blobs/mainboard/amd/mandolin/EC_cereme.bin" if BOARD_AMD_CEREME
help
The EC firmware blob is usually the first 128kByte of the stock
firmware image.
if !AMD_LPC_DEBUG_CARD
choice
prompt "State of IOMux for LPC/eMMC signals"
default MANDOLIN_IOMUX_USE_EMMC
help
Mandolin is designed to use either LPC or eMMC signals. Use this
selection to determine which are configured for this image.
config MANDOLIN_IOMUX_USE_LPC
bool "LPC signals"
config MANDOLIN_IOMUX_USE_EMMC
bool "eMMC signals"
endchoice
endif # !AMD_LPC_DEBUG_CARD
config PICASSO_LPC_IOMUX
bool
default y if MANDOLIN_IOMUX_USE_LPC
help
Picasso's LPC bus signals are MUXed with some of the EMMC signals.
Select this option if LPC signals are required.
#TODO: remove this hack to not break graphics in combination with SeaBIOS
config VGA_BIOS_DGPU_ID
string
default "1002,15d8"
help
The default VGA BIOS PCI vendor/device ID should be set to the
result of the map_oprom_vendev() function in northbridge.c.
config VGA_BIOS_DGPU_FILE
string
default "3rdparty/amd_blobs/picasso/PicassoGenericVbios.bin" if BOARD_AMD_MANDOLIN
default "3rdparty/amd_blobs/picasso/Raven2GenericVbios.bin" if BOARD_AMD_CEREME
config EFS_SPI_READ_MODE
int
default 0 if EM100
default 0 if BOARD_AMD_CEREME
default 3
config EFS_SPI_SPEED
int
default 3 if EM100
default 1 if BOARD_AMD_CEREME
default 0
config EFS_SPI_MICRON_FLAG
int
default 0
endif # BOARD_AMD_MANDOLIN || BOARD_AMD_CEREME
|
