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|
chip soc/intel/jasperlake
device cpu_cluster 0 on end
# GPE configuration
# Note that GPE events called out in ASL code rely on this
# route. i.e. If this route changes then the affected GPE
# offset bits also need to be changed.
register "pmc_gpe0_dw0" = "GPP_B"
register "pmc_gpe0_dw1" = "GPP_H"
register "pmc_gpe0_dw2" = "GPP_E"
# FSP configuration
register "SaGv" = "SaGv_Enabled"
register "SmbusEnable" = "1"
register "ScsEmmcHs400Enabled" = "1"
register "SdCardPowerEnableActiveHigh" = "1"
# Display related UPDs
# Select eDP for port A (1 = eDP, 2 = MIPI)
register "DdiPortAConfig" = "1"
# Enable HPD for DDI ports B/C
register "DdiPortBHpd" = "1"
register "DdiPortCHpd" = "1"
# Enable DDC for DDI ports B/C
register "DdiPortBDdc" = "1"
register "DdiPortCDdc" = "1"
register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # Type-C Port1
register "usb2_ports[1]" = "USB2_PORT_MID(OC2)" # USB2 Type A port1
register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Type-C Port2
register "usb2_ports[3]" = "USB2_PORT_MID(OC0)" # USB2 Type A port2
register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # USB2 Bluetooth
register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # USB2 WWAN
register "usb2_ports[6]" = "USB2_PORT_MID(OC2)" # USB2 Type A port3
register "usb2_ports[7]" = "USB2_PORT_MID(OC3)" # USB2 Type A port4
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-C Port1
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-C Port2
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A port1
register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC2)" # USB3 WWAN
register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC2)" # UNUSED
register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC_SKIP)" # UNUSED
# Enable Pch iSCLK
register "pch_isclk" = "1"
# EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
register "gen1_dec" = "0x00fc0801"
register "gen2_dec" = "0x000c0201"
# EC memory map range is 0x900-0x9ff
register "gen3_dec" = "0x00fc0901"
# Skip the CPU replacement check
register "SkipCpuReplacementCheck" = "1"
register "PchHdaDspEnable" = "1"
register "PchHdaAudioLinkHdaEnable" = "0"
register "PchHdaAudioLinkSspEnable[0]" = "1"
register "PchHdaAudioLinkSspEnable[1]" = "1"
register "PchHdaAudioLinkDmicEnable[0]" = "1"
register "PchHdaAudioLinkDmicEnable[1]" = "1"
# PCIe port 1 for M.2 E-key WLAN
# Enable Root Port 4(x4) for NVMe
register "PcieRpEnable[1]" = "1"
register "PcieRpEnable[4]" = "1"
# Enable ClkReqDetect 1 for WLAN
# Enable ClkReqDetect 4 for NVMe
register "PcieRpClkReqDetect[1]" = "1"
register "PcieRpClkReqDetect[4]" = "1"
register "PcieClkSrcUsage[0]" = "0x04"
register "PcieClkSrcUsage[1]" = "0x01"
register "PcieClkSrcUsage[2]" = "0xFF"
register "PcieClkSrcUsage[3]" = "0xFF"
register "PcieClkSrcUsage[4]" = "0xFF"
register "PcieClkSrcUsage[5]" = "0xFF"
register "PcieClkSrcClkReq[0]" = "0x00"
register "PcieClkSrcClkReq[1]" = "0x01"
register "PcieClkSrcClkReq[2]" = "0x02"
register "PcieClkSrcClkReq[3]" = "0x03"
register "PcieClkSrcClkReq[4]" = "0x04"
register "PcieClkSrcClkReq[5]" = "0x05"
register "SerialIoI2cMode" = "{
[PchSerialIoIndexI2C0] = PchSerialIoPci,
[PchSerialIoIndexI2C1] = PchSerialIoDisabled,
[PchSerialIoIndexI2C2] = PchSerialIoDisabled,
[PchSerialIoIndexI2C3] = PchSerialIoDisabled,
[PchSerialIoIndexI2C4] = PchSerialIoPci,
[PchSerialIoIndexI2C5] = PchSerialIoPci,
}"
register "SerialIoGSpiMode" = "{
[PchSerialIoIndexGSPI0] = PchSerialIoDisabled,
[PchSerialIoIndexGSPI1] = PchSerialIoPci,
[PchSerialIoIndexGSPI2] = PchSerialIoDisabled,
}"
register "SerialIoGSpiCsMode" = "{
[PchSerialIoIndexGSPI0] = 1,
[PchSerialIoIndexGSPI1] = 1,
[PchSerialIoIndexGSPI2] = 1,
}"
register "SerialIoGSpiCsState" = "{
[PchSerialIoIndexGSPI0] = 0,
[PchSerialIoIndexGSPI1] = 0,
[PchSerialIoIndexGSPI2] = 0,
}"
register "SerialIoUartMode" = "{
[PchSerialIoIndexUART0] = PchSerialIoDisabled,
[PchSerialIoIndexUART1] = PchSerialIoDisabled,
[PchSerialIoIndexUART2] = PchSerialIoSkipInit,
}"
# Enable DPTF
register "dptf_enable" = "1"
# Add PL1 and PL2 values
register "power_limits_config[JSL_N4500_6W_CORE]" = "{
.tdp_pl1_override = 6,
.tdp_pl2_override = 20,
}"
register "power_limits_config[JSL_N6000_6W_CORE]" = "{
.tdp_pl1_override = 6,
.tdp_pl2_override = 20,
}"
register "power_limits_config[JSL_N5100_6W_CORE]" = "{
.tdp_pl1_override = 6,
.tdp_pl2_override = 20,
}"
register "power_limits_config[JSL_N4505_10W_CORE]" = "{
.tdp_pl1_override = 10,
.tdp_pl2_override = 25,
}"
register "power_limits_config[JSL_N5105_10W_CORE]" = "{
.tdp_pl1_override = 10,
.tdp_pl2_override = 25,
}"
register "power_limits_config[JSL_N6005_10W_CORE]" = "{
.tdp_pl1_override = 10,
.tdp_pl2_override = 25,
}"
# Enable S0ix
register "s0ix_enable" = "1"
# GPIO for SD card detect
register "sdcard_cd_gpio" = "VGPIO_39"
register "common_soc_config" = "{
.gspi[1] = {
.speed_mhz = 1,
.early_init = 1,
},
.i2c[0] = {
.speed = I2C_SPEED_FAST,
.speed_config[0] = {
.speed = I2C_SPEED_FAST,
.scl_lcnt = 176,
.scl_hcnt = 95,
.sda_hold = 36,
}
},
.i2c[4] = {
.speed = I2C_SPEED_FAST,
},
.i2c[5] = {
.speed = I2C_SPEED_FAST,
},
}"
# Set the minimum assertion width
register "PchPmSlpS3MinAssert" = "3" # 50ms
register "PchPmSlpS4MinAssert" = "1" # 1s
register "PchPmSlpSusMinAssert" = "3" # 1s
register "PchPmSlpAMinAssert" = "3" # 98ms
# NOTE: Duration programmed in the below register should never be smaller than the
# stretch duration programmed in the following registers -
# - GEN_PMCON_A.SLP_S3_MIN_ASST_WDTH (PchPmSlpS3MinAssert)
# - GEN_PMCON_A.S4MAW (PchPmSlpS4MinAssert)
# - PM_CFG.SLP_A_MIN_ASST_WDTH (PchPmSlpAMinAssert)
# - PM_CFG.SLP_LAN_MIN_ASST_WDTH
register "PchPmPwrCycDur" = "1" # 1s
# Set xHCI LFPS period sampling off time, the default is 9ms.
register "xhci_lfps_sampling_offtime_ms" = "9"
device domain 0 on
device pci 00.0 on end # Host Bridge
device pci 02.0 on end # Integrated Graphics Device
device pci 04.0 on
chip drivers/intel/dptf
register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 95, 1000)"
register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 119, SHUTDOWN)"
register "controls.power_limits.pl1" = "{
.min_power = 3000,
.max_power = 6000,
.time_window_min = 1 * MSECS_PER_SEC,
.time_window_max = 1 * MSECS_PER_SEC,
.granularity = 200,}"
register "controls.power_limits.pl2" = "{
.min_power = 20000,
.max_power = 20000,
.time_window_min = 1 * MSECS_PER_SEC,
.time_window_max = 1 * MSECS_PER_SEC,
.granularity = 1000,}"
device generic 0 on end
end
end # SA Thermal device
device pci 05.0 on
chip drivers/intel/mipi_camera
register "acpi_uid" = "0x50000"
register "acpi_name" = ""IPU0""
register "device_type" = "INTEL_ACPI_CAMERA_CIO2"
register "cio2_num_ports" = "2"
register "cio2_lanes_used" = "{2,2}"
register "cio2_lane_endpoint[0]" = ""^I2C4.CAM0""
register "cio2_lane_endpoint[1]" = ""^I2C5.CAM1""
register "cio2_prt[0]" = "0"
register "cio2_prt[1]" = "2"
device generic 0 on end
end
end
device pci 12.0 off end # Thermal Subsystem
device pci 12.5 off end # UFS SCS
device pci 12.6 off end # GSPI #2
device pci 14.0 on
chip drivers/usb/acpi
register "desc" = ""Root Hub""
register "type" = "UPC_TYPE_HUB"
device usb 0.0 on
chip drivers/usb/acpi
register "desc" = ""USB3/2 Type-A Left Lower""
register "type" = "UPC_TYPE_A"
device usb 2.0 on end
end
chip drivers/usb/acpi
register "desc" = ""WWAN""
register "type" = "UPC_TYPE_INTERNAL"
device usb 2.1 on end
end
chip drivers/usb/acpi
register "desc" = ""Bluetooth""
register "type" = "UPC_TYPE_INTERNAL"
device usb 2.2 on end
end
chip drivers/usb/acpi
register "desc" = ""USB C Connector 1""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
device usb 2.3 on end
end
chip drivers/usb/acpi
register "desc" = ""USB C Connector 2""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
device usb 2.4 on end
end
chip drivers/usb/acpi
register "desc" = ""USB C Connector 3""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
device usb 2.5 on end
end
chip drivers/usb/acpi
register "desc" = ""USB C Connector 4""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
device usb 2.6 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3/2 Type-A Left Upper""
register "type" = "UPC_TYPE_A"
device usb 2.7 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3/2 Type-A Left Lower""
register "type" = "UPC_TYPE_A"
device usb 3.0 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3/2 Type-A Left Upper""
register "type" = "UPC_TYPE_A"
device usb 3.1 on end
end
chip drivers/usb/acpi
register "desc" = ""WLAN""
register "type" = "UPC_TYPE_INTERNAL"
device usb 3.2 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Port Unused1""
register "type" = "UPC_TYPE_INTERNAL"
device usb 3.3 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Port Unused2""
register "type" = "UPC_TYPE_INTERNAL"
device usb 3.4 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Port Unused3""
register "type" = "UPC_TYPE_INTERNAL"
device usb 3.5 on end
end
end
end
end # USB xHCI
device pci 14.1 off end # USB xDCI (OTG)
device pci 14.2 off end # PMC SRAM
device pci 14.3 on
chip drivers/wifi/generic
register "wake" = "GPE0_PME_B0"
device generic 0 on end
end
end # CNVi wifi
device pci 14.5 on end # SDCard
device pci 15.0 on
chip drivers/i2c/max98373
register "vmon_slot_no" = "4"
register "imon_slot_no" = "5"
register "uid" = "0"
register "desc" = ""RIGHT SPEAKER AMP""
register "name" = ""MAXR""
device i2c 31 on end
end
chip drivers/i2c/max98373
register "vmon_slot_no" = "6"
register "imon_slot_no" = "7"
register "uid" = "1"
register "desc" = ""LEFT SPEAKER AMP""
register "name" = ""MAXL""
device i2c 32 on end
end
chip drivers/i2c/da7219
register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_H16_IRQ)"
register "btn_cfg" = "50"
register "mic_det_thr" = "500"
register "jack_ins_deb" = "20"
register "jack_det_rate" = ""32ms_64ms""
register "jack_rem_deb" = "1"
register "a_d_btn_thr" = "0xa"
register "d_b_btn_thr" = "0x16"
register "b_c_btn_thr" = "0x21"
register "c_mic_btn_thr" = "0x3e"
register "btn_avg" = "4"
register "adc_1bit_rpt" = "1"
register "micbias_lvl" = "2600"
register "mic_amp_in_sel" = ""diff""
device i2c 1a on end
end
end # I2C #0 Audio
device pci 15.1 off end # I2C #1
device pci 15.2 off end # I2C #2
device pci 15.3 off end # I2C #3
device pci 16.0 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT Redirection
device pci 16.4 off end # Management Engine Interface 3
device pci 16.5 off end # Management Engine Interface 4
device pci 17.0 off end # SATA
device pci 19.0 on # I2C #4 Cam 0
chip drivers/intel/mipi_camera
register "acpi_hid" = ""OVTI2740""
register "acpi_uid" = "0"
register "acpi_name" = ""CAM0""
register "chip_name" = ""Ov 2740 Camera""
register "device_type" = "INTEL_ACPI_CAMERA_SENSOR"
register "has_power_resource" = "1"
register "ssdb.lanes_used" = "2"
register "num_freq_entries" = "1"
register "link_freq[0]" = "360000000"
register "remote_name" = ""IPU0""
#Controls
register "clk_panel.clks[0].clknum" = "0" #IMGCLKOUT_3
register "clk_panel.clks[0].freq" = "1" #19.2 Mhz
register "gpio_panel.gpio[0].gpio_num" = "GPP_D5" #reset
register "gpio_panel.gpio[1].gpio_num" = "GPP_B14" #power
#_ON
register "on_seq.ops_cnt" = "4"
register "on_seq.ops[0]" = "SEQ_OPS_CLK_ENABLE(0, 0)"
register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)"
register "on_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 5)"
register "on_seq.ops[3]" = "SEQ_OPS_GPIO_ENABLE(1, 5)"
#_OFF
register "off_seq.ops_cnt" = "3"
register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(1, 0)"
register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
register "off_seq.ops[2]" = "SEQ_OPS_CLK_DISABLE(0, 0)"
device i2c 10 on end
end
end
device pci 19.1 on # I2C #5 Cam 1 and VCM
chip drivers/intel/mipi_camera
register "acpi_hid" = ""OVTI5675""
register "acpi_uid" = "0"
register "acpi_name" = ""CAM1""
register "chip_name" = ""Ov 5675 Camera""
register "device_type" = "INTEL_ACPI_CAMERA_SENSOR"
register "ssdb.lanes_used" = "2"
register "ssdb.link_used" = "1"
register "ssdb.vcm_type" = "0x0C"
register "vcm_name" = ""VCM0""
register "num_freq_entries" = "1"
register "link_freq[0]" = "DEFAULT_LINK_FREQ"
register "remote_name" = ""IPU0""
register "has_power_resource" = "1"
#Controls
register "clk_panel.clks[0].clknum" = "1" #IMGCLKOUT_3
register "clk_panel.clks[0].freq" = "1" #19.2 Mhz
register "gpio_panel.gpio[0].gpio_num" = "GPP_D4" #power_enable
register "gpio_panel.gpio[1].gpio_num" = "GPP_C19" #reset
#_ON
register "on_seq.ops_cnt" = "4"
register "on_seq.ops[0]" = "SEQ_OPS_CLK_ENABLE(0, 0)"
register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)"
register "on_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 5)"
register "on_seq.ops[3]" = "SEQ_OPS_GPIO_ENABLE(1, 5)"
#_OFF
register "off_seq.ops_cnt" = "3"
register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(1, 0)"
register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
register "off_seq.ops[2]" = "SEQ_OPS_CLK_DISABLE(0, 0)"
device i2c 36 on end
end
chip drivers/intel/mipi_camera
register "acpi_hid" = "ACPI_DT_NAMESPACE_HID"
register "acpi_uid" = "3"
register "acpi_name" = ""VCM0""
register "chip_name" = ""DW AF DAC""
register "device_type" = "INTEL_ACPI_CAMERA_VCM"
register "pr0" = ""\\_SB.PCI0.I2C5.CAM1.PRIC""
register "vcm_compat" = ""dongwoon,dw9714""
register "ssdb.lanes_used" = "2"
register "num_freq_entries" = "1"
register "link_freq[0]" = "DEFAULT_LINK_FREQ"
register "remote_name" = ""IPU0""
device i2c 0C on end
end
end
device pci 19.2 on end # UART #2
device pci 1a.0 on end # eMMC
device pci 1c.0 off end # PCI Express Port 1
device pci 1c.1 on end # PCI Express Port 2 - WLAN
device pci 1c.2 off end # PCI Express Port 3
device pci 1c.3 off end # PCI Express Port 4
device pci 1c.4 on end # PCI Express Port 5 - NVMe
device pci 1c.5 off end # PCI Express Port 6
device pci 1c.6 off end # PCI Express Port 7
device pci 1c.7 off end # PCI Express Port 8
device pci 1e.0 on end # UART #0
device pci 1e.1 off end # UART #1
device pci 1e.2 off end # GSPI #0
device pci 1e.3 on
chip drivers/spi/acpi
register "hid" = "ACPI_DT_NAMESPACE_HID"
register "compat_string" = ""google,cr50""
register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_H13_IRQ)"
device spi 0 on end
end
end # GSPI #1
device pci 1f.0 on end # eSPI Interface
device pci 1f.1 on end # P2SB
device pci 1f.2 hidden end # Power Management Controller
device pci 1f.3 on end # Intel HDA
device pci 1f.4 on end # SMBus
device pci 1f.5 on end # PCH SPI
device pci 1f.6 off end # GbE
end
end
|
